High throughput binarization (HTB) method for CABAC in HEVC

US9654139B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9654139-B2
Application numberUS-201213354272-A
CountryUS
Kind codeB2
Filing dateJan 19, 2012
Priority dateJan 19, 2012
Publication dateMay 16, 2017
Grant dateMay 16, 2017

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  5. First independent claim

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Abstract

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Provided is an electronic device configured for high throughput binarization mode. The electronic device includes a processor and instructions stored in memory that is in electronic communication with the processor. The electronic device obtains a block of transformed and quantized coefficients (TCQs). The electronic device determines whether a high throughput binarization mode condition is met. If the condition is met, the electronic device uses the high throughput binarization mode to process the block. If the condition is not met, the electronic device does not use the high throughput binarization mode to process the block. The electronic device transmits the generated first or second bitstream to a decoder.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for decoding a bit stream associated with transform coefficients comprising: obtaining a bit steam; and determining whether to decode level information of a 4×4 block of a block from the bit stream using: a high throughput binarization mode and a bypass decoding mode, or selectively using a regular decoding mode and the bypass decoding mode, based on a value of a high throughput binarizaiton mode indicator in a header that is contained in the bit stream and corresponding to the 4×4 block, in response to determining that the value of the high throughput binarizaiton mode indicator is a first value, decoding a binary symbol corresponding to the 4×4 block from the bit stream by using the bypass decoding mode, de-binarizing the bypass decoded binary symbol by using the high throughput binarizaiton mode to obtain an input value, and deriving a sign and level information of the 4×4 block by mapping the obtained input value using a mapping table predefined; in response to determining that the value of the high throughput binarizaiton mode indicator is a second value that is different from the first value, decoding level information of the 4×4 block from the bit steam by selectively using the regular decoding mode and the bypass decoding mode. 2. The method of claim 1 , wherein the high throughput binarizaiton is selected from a group of binarization tables based on the obtained input value. 3. The method of claim 2 , wherein the binarizaiton tables are Variable Length Coding (VLC) tables of Context Adaptive Variable Length Coding (CAVLC). 4. The method of claim 2 , further comprising: determining whether the obtained input value is greater than a preset threshold; and updating the binarization tables responsive to determining that the obtained input value is greater than the preset threshold. 5. The method of claim 2 , wherein, the header is slice header. 6. The method of claim 2 , wherein, the value of the high throughput binarization mode indicator is set to the first value at an encoding side when: a characteristic corresponding to the 4×4 block is greater than a preset threshold; or the slice level of the 4×4 block is greater than a preset threshold; or the transform unit of the 4×4 block is greater than a preset threshold.

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Classifications

  • H03M7/4018Primary

    Context adapative binary arithmetic codes [CABAC] · CPC title

  • with binary alpha-plane coding for video objects, e.g. context-based arithmetic encoding [CAE] · CPC title

  • Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC] · CPC title

  • Entropy coding, e.g. variable length coding [VLC] or arithmetic coding · CPC title

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What does patent US9654139B2 cover?
Provided is an electronic device configured for high throughput binarization mode. The electronic device includes a processor and instructions stored in memory that is in electronic communication with the processor. The electronic device obtains a block of transformed and quantized coefficients (TCQs). The electronic device determines whether a high throughput binarization mode condition is met…
Who is the assignee on this patent?
Kim Seung-Hwan, Misra Kiran, Kerofsky Louis Joseph, and 2 more
What technology area does this patent fall under?
Primary CPC classification H03M7/4018. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 16 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).