Method for fabrication of high aspect ratio trenches and formation of nanoscale features therefrom

Patent metadata

Field	Value
Publication number	US-9653309-B2
Application number	US-201314403550-A
Country	US
Kind code	B2
Filing date	May 24, 2013
Priority date	May 25, 2012
Publication date	May 16, 2017
Grant date	May 16, 2017

Abstract

A process for forming trenches in a target material includes forming a masking layer onto the target material, where the masking layer comprises a material having high selectivity to a plasma etch gas adapted for etching the target material. A pattern is formed in the masking layer to expose portions of the target material and the sample is placed on an angle mount at a pre-determined angle relative to a cathode of a reactive ion etcher so that the target material is within a plasma dark space of the plasma etch gas. Ballistic ions within the plasma dark space form a trench structure within the target material. The process may further include repeating the steps of positioning the sample and etching the exposed portions of the target material with the substrate at a different angle to define a triangular structure.

First claim

The invention claimed is:

1. A method for forming a nanoscale feature in a device substrate, comprising:
creating a mask in a target material, comprising:
forming a masking layer on the target material on a substrate, wherein the target material is removable using a reactive ion etch in a plasma etch gas and wherein the masking layer comprises a material having a lower etch rate using the etch gas than the etch rate of the target material in the same etch gas;
forming a pattern in the masking layer to expose portions of the target material;
positioning the substrate on an angle mount at a pre-determined angle relative to a cathode of a reactive ion etcher so that the target material is within a plasma dark space of the plasma etch gas; and
etching the exposed portions of the target material using ballistic ions within the plasma dark space for a sufficient period of time to form an angled trench structure having a trench width and a trench depth;

disposing the mask on the device substrate; and
exposing the mask and device substrate to a stream of molecules or ions to form a device feature in the device substrate at an exposed area corresponding to a portion of the angled trench structure that provides a straight path to the device substrate, wherein the exposed area has an exposed width that is smaller than the trench width.

2. The method of claim 1 , further comprising repeating the steps of positioning the substrate and etching the exposed portions of the target material with the substrate disposed at a different angle to define a triangular structure.

3. The method of claim 2 , wherein the different angle comprises the reverse of the pre-determined angle so that the triangular structure comprises an array of isosceles triangles.

4. The method of claim 2 , wherein the different angle comprises a zero degree angle so that the triangular structure comprises a sawtooth pattern.

5. The method of claim 1 , wherein the target material is a photoresist and the plasma etch gas is oxygen.

6. The method of claim 1 , wherein the masking layer is germanium and the step of forming a pattern in the masking layer comprises:
applying a layer of photoresist over the germanium;
patterning the photoresist to expose portions of the germanium; and
etching through the exposed germanium to expose portions of the target material.

7. The method of claim 6 , wherein the germanium is evaporated onto the target material.

8. The method of claim 6 , wherein the step of etching the exposed germanium comprises performing a chlorine plasma etch.

9. The method of claim 6 , wherein the photoresist has a thickness wherein at least a portion of the photoresist remains after etching the exposed germanium.

10. The method of claim 1 , wherein the step of forming a pattern in the masking layer comprises:
applying a layer of photoresist over the masking layer;
patterning the photoresist to expose portions of the masking layer; and
etching through the exposed masking layer to expose portions of the target material.

11. The method of claim 10 , wherein the step of patterning comprises using a lithography method selected from the group consisting of optical lithography, laser lithography, electron beam lithography, and focused ion beam lithography to expose the photoresist.

12. The method of claim 10 , wherein the masking layer is selected from the group consisting of germanium, titanium, silicon nitride, silicon, silicon-germanium, and combinations thereof.

13. The method of claim 1 , wherein the step of mounting the substrate on the angle mount comprises applying a thermal compound to the angle mount.

14. A method for forming a nanoscale feature in a device substrate, comprising:
creating an angled profile in a target layer on a substrate, comprising:
applying a masking layer over the target layer, wherein the masking layer comprises a material having a lower etch rate in a reactive ion plasma etch gas than the etch rate of the target layer in the same plasma etch gas;
applying a layer of lithography resist over the masking layer;
forming a pattern in the lithography resist to expose portions of the masking layer;
etching through the exposed masking layer to expose portions of the target layer;
mounting the substrate on an angled mount having a pre-determined angle;
positioning the substrate on the angled mount within a plasma dark space of a reactive ion plasma etcher using the plasma etch gas adapted for etching the target layer; and
etching at least a portion of the target layer using ballistic ions within the plasma dark space to define one or more angled trenches having trench widths within the target layer;

disposing the mask on the device substrate; and
exposing the mask and device substrate to a stream of molecules or ions to form device features in the device substrate at exposed areas corresponding to portions of the one or more angled trenches that provide a straight path to the device substrate, wherein the exposed areas have exposed widths that are smaller than the trench widths.

15. The method of claim 14 , further comprising repeating the steps of positioning the substrate and etching at least a portion of the target layer with the substrate disposed at a different angle to define a triangular structure.

16. The method of claim 14 , wherein the different angle comprises the reverse of the pre-determined angle so that the triangular structure comprises an array of isosceles triangles.

17. The method of claim 14 , wherein the different angle comprises a zero degree angle so that the triangular structure comprises a sawtooth pattern.

18. The method of claim 14 , wherein the step of mounting the substrate on the angle mount comprises applying a thermal compound to the angle mount.

19. The method of claim 14 , wherein the target layer is photoresist, and further comprising curing the photoresist prior to applying the masking layer.

20. The method of claim 14 , wherein the masking layer is germanium.

21. The method of claim 20 , wherein the germanium is evaporated onto the target layer.

22. The method of claim 20 , wherein the step of etching the exposed masking layer comprises performing a chlorine plasma etch.

23. The method of claim 14 , wherein the masking layer is a material selected from the group consisting of germanium, titanium, silicon nitride, silicon, silicon-germanium, and combinations thereof.

24. The method of claim 14 , wherein the lithography resist has a thickness wherein at least a portion of the lithography resist remains after etching the exposed masking material.

25. The method of claim 14 , wherein the step of forming a pattern comprising performing electron beam lithography.

26. The method of claim 14 , wherein the step of forming a pattern comprises performing a lithographic process selected from the group consisting of optical lithography, laser lithography, electron beam lithography, and focused ion beam lithography to expose the resist.

Assignees

• Univ California

Inventors

• Dynes Robert C
• Roediger Peter
• Wong Travis
• Cybart Shane A

Classifications

• H10P50/287

  by chemical means · CPC title

• H10P50/691

  for Group V materials or Group III-V materials · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/00

  Etching of wafers, substrates or parts of devices · CPC title

• H10P50/242 Primary

  of Group IV materials · CPC title