Memory control device and mobile terminal

Patent metadata

Field	Value
Publication number	US-9653045-B2
Application number	US-201414785698-A
Country	US
Kind code	B2
Filing date	Mar 28, 2014
Priority date	Apr 26, 2013
Publication date	May 16, 2017
Grant date	May 16, 2017

Abstract

To prevent tearing in a case where image data is compressed to be written into a frame memory, the present invention includes (i) a compression section ( 33 ) for compressing image data for a single frame, the image data being transferred from a host processor ( 2 ), and writing the image data into a frame memory ( 31 ), (ii) an expansion section for reading image data, expanding the image data, and transferring the image data to an LCD ( 4 ), and (iii) a delay control section ( 32 ) for, until an inhibit time period Ts passes after the start of reading image data for a first frame, inhibiting the start of writing image data.

First claim

The invention claimed is:

1. A memory control device, comprising:
a frame memory having a predetermined recording capacity;
a compression section for (i) compressing image data for a single frame, the image data being transferred from a host, into a size not larger than the recording capacity and (ii) writing the compressed image data into the frame memory;
an expansion section for (i) reading the compressed image data from the frame memory, (ii) expanding the compressed image data, and (iii) transferring the expanded image data to a display control section; and
a timing control section for, until an inhibit time period Ts passes from a start of reading compressed image data for a first frame, inhibiting a start of writing compressed image data for a second frame subsequent to the first frame, the inhibit time period Ts being so preset as to prevent coincidence between a range of a move of a read position over the frame memory and a range of a move of a write position over the frame memory; wherein
the inhibit time period Ts is not shorter than a critical time period Td and is shorter than a read time period Tout, the critical time period Td being a time period preset so as to prevent coincidence between a range of a move of a read position over the frame memory and a range of a move of a write position over the frame memory provided that a write rate of writing by the compression section is variable between a minimum write rate and a maximum write rate and a read rate of reading by the expansion section is variable between a minimum read rate and a maximum read rate, and the read time period Tout being a fixed time period over which the expansion section reads the compressed image data for the single frame.

2. The memory control device according to claim 1 ,
wherein
the inhibit time period Ts is so preset that the read position for the compressed image data for the first frame which read position moves over the frame memory most slowly is not overtaken by the write position for the compressed image data for the second frame which write position moves over the frame memory most rapidly.

3. The memory control device according to claim 1 ,
wherein:
the compression section has (i) a maximum write rate that is α times an average write rate and (ii) a minimum write rate that is β times the average write rate;
the expansion section has (i) a maximum read rate that is α times an average read rate and (ii) a minimum read rate that is β times the average read rate;
the compression section writes the compressed image data for the single frame over a fixed write time period Tin;
the expansion section reads the compressed image data for the single frame over the read time period Tout; and
the inhibit time period Ts is (i) not shorter than the critical time period Td and (ii) shorter than the read time period Tout,
the critical time period Td being, in a case where Tin>Tout, represented by

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4. The memory control device according to claim 1 ,
wherein:
the compression section compresses the image data for the single frame into a size not larger than an upper limit value Vsize, the Vsize being a maximum size of compressed image data; and
the predetermined recording capacity is not smaller than the Vsize and not larger than the Vsize×11/10.

Assignees

• Sharp Kk

Inventors

• Asai Junki

Classifications

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

• G09G5/393

  Arrangements for updating the contents of the bit-mapped memory · CPC title

• G09G2340/02

  Handling of images in compressed format, e.g. JPEG, MPEG · CPC title

• G09G5/12

  Synchronisation between the display unit and other units, e.g. other display units, video-disc players · CPC title

• G09G5/18

  Timing circuits for raster scan displays (specially adapted for television H04N {; synchronisation between the display unit and other display units, videodisc player G09G5/12}) · CPC title