Systems and methods for downloading code and data into a secure non-volatile memory

US9653004B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9653004-B2
Application numberUS-25320708-A
CountryUS
Kind codeB2
Filing dateOct 16, 2008
Priority dateOct 16, 2008
Publication dateMay 16, 2017
Grant dateMay 16, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for downloading information into a secure non-volatile memory of a secure embedded device (SED) during a manufacturing or personalization process. The method involves communicating the information and a software program from a device to a temporary storage memory of the SED. The method also involves starting the software program provided to facilitate an initialization of a first key and to facilitate a transfer of at least a portion of the information from the temporary storage memory to the secure non-volatile memory. In response to starting, the software program, the first key is initialized and the portion of information is transformed into transformed information locally at the SED using at least one of a scramble algorithm and a cipher algorithm. Thereafter, the transformed information is written to a memory element of the secure non-volatile memory.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for downloading information to a secure embedded device (SED), comprising: scrambling or ciphering, by a first processor, the information into first transformed information at a computing device using a first scramble algorithm or a first cipher algorithm and generating a first key; transferring, by the first processor, the first transformed information, the first key and a software program from the computing device into a temporary storage memory of the SED; running the software program by a second processor of the SED, to facilitate an initialization of a second key and to facilitate a transfer of the first transformed information from the temporary storage memory to a secure non-volatile memory of the SED; in response to the running the software program, initializing, by the second processor, the second key at the SED, and descrambling or deciphering, at a descrambling/deciphering mechanism in the SED, the first transformed information into second transformed information using the first key; scrambling or ciphering, by the second processor, the second transformed information into third transformed information at a scrambling/ciphering mechanism of the SED using a second scramble algorithm or a second cipher algorithm wherein the third transformed information is defined by the second key; and writing, by the second processor, at least a portion of the third transformed information to a memory location of a memory element of the secure non-volatile memory, wherein the memory location is defined by the second key. 2. The method of claim 1 , further comprising: generating a random number or a pseudo random number at the computing device, and wherein the initializing the second key comprises: initializing the second key with the random number. 3. The method of claim 1 , further comprising: generating a random number or a pseudo random number at the secure embedded device; and wherein the initializing the second key comprises: initializing the second key with the random number. 4. The method of claim 1 , further comprising: selecting at least one of a boot loader program and an initial program loader to be included in the information. 5. The method of claim 1 , wherein the second scramble algorithm is different from the first scramble algorithm. 6. The method of claim 1 , wherein the second cipher algorithm is different from the first cipher algorithm. 7. The method of claim 1 , further comprising: determining if the second transformed information is corrupt prior to the scrambling or ciphering the second transformed information into the third transformed information. 8. The method of claim 1 , further comprising: authenticating at least one of a signature and a checksum appended to the second transformed information prior to the scrambling or ciphering the second transformed information into the third transformed information. 9. The method of claim 1 , further comprising: descrambling the third transformed information retrieved from the memory location, by a descrambling/deciphering mechanism of the SED into the second transformed information, wherein the second transformed information is original code capable of being executed by a processor. 10. The method of claim 9 , further comprising: executing the original code. 11. The method of claim 1 , further comprising: deciphering the third transformed information retrieved from the memory location, by a descrambling/deciphering mechanism of the SED into the second transformed information, wherein the second transformed information is original code capable of being executed by a processor. 12. The method of claim 11 , further comprising: executing the original code. 13. A system, comprising: a computing device comprising a first processor, the first processor configured to store information, scramble or cipher the information into first transformed information using a first scramble algorithm or a first cipher algorithm and generate a first key based on the first scramble algorithm or the first cipher algorithm, and a software program; and a secure embedded device, communicatively coupled to the computing device, the secure embedded device comprising a second processor, the second processor configured to: receive the first transformed information, the first key, and the software program from the computing device, store the first transformed information, the first key, and the software program in a temporary storage memory thereof, descramble or decipher the first transformed information into second transformed information using at least the first key, start the software program to facilitate an initialization of a second key and to facilitate a transfer of the second transformed information from the temporary storage memory to a secure non-volatile memory, in response to the software program, initialize the second key to scramble or cipher the second transformed information into third transformed information using a second scramble algorithm or a second cipher algorithm, and write at least a portion of the third transformed information to a memory location of a memory element of the secure non-volatile memory, wherein the memory location is defined by the second key. 14. The system according of claim 13 , wherein the second processor is further configured to: start the software program to facilitate the initialization of the second key; and scramble or cipher the second transformed information to the third transformed information and to communicate the third transformed information to the memory element. 15. The system of claim 13 , wherein the computing device is configured to generate a random number or a pseudo random number, and wherein the second processor of the secure embedded device is further configured to initialize the second key with the random number or the pseudo random number. 16. The system according of claim 13 , wherein the second processor of the secure embedded device is further configured to generate a random number or a pseudo random number and to initialize the second key with the random number or the pseudo random number. 17. The system of claim 13 , wherein the information comprises a boot loader program or an initial program loader. 18. The system of claim 13 , wherein the second scramble algorithm is different from the first scramble algorithm and the second cipher algorithm is different from the first cipher algorithm. 19. The system of claim 13 , wherein the second processor of the secure embedded device is further configured to determine if the second transformed information is corrupt prior to scrambling or ciphering the second transformed information into the third transformed information. 20. The system of claim 13 , wherein the second processor of the secure embedded device is further configured to authenticate a signature or a checksum appended to the second transformed information prior to scrambling or ciphering the second transformed information into the third transformed information. 21. A secure embedded device, comprising: a temporary storage memory; a secure non-volatile memory; and a processor coupled to the temporary storage memory and the secure non-volatile memory, the processor configured to: receive scrambled or ciphered information, a first key, and a software program communicated from an external device, store the scrambled or ciphered information, the first key, and the software program in the temporary storage memo

Assignees

Inventors

Classifications

  • to a system of files or objects, e.g. local or distributed file system or database · CPC title

  • Details relating to cryptographic hardware or logic circuitry · CPC title

  • H04L9/3247Primary

    involving digital signatures · CPC title

  • involving random numbers or seeds · CPC title

  • G09C1/00Primary

    Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system (cryptographic typewriters G09C3/00) · CPC title

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What does patent US9653004B2 cover?
A method for downloading information into a secure non-volatile memory of a secure embedded device (SED) during a manufacturing or personalization process. The method involves communicating the information and a software program from a device to a temporary storage memory of the SED. The method also involves starting the software program provided to facilitate an initialization of a first key a…
Who is the assignee on this patent?
Boscher Arnaud, Prawitz Nicolas, Cypress Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification H04L9/3247. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 16 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).