Gradient adjustment for texture mapping for multiple render targets with resolution that varies by screen location

US9652882B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9652882-B2
Application numberUS-201414246062-A
CountryUS
Kind codeB2
Filing dateApr 5, 2014
Priority dateApr 5, 2014
Publication dateMay 16, 2017
Grant dateMay 16, 2017

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Abstract

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In a computer graphics processing unit (GPU) having a shader and a texture unit the pixel shader is configured to receive or generate one or more sets of texture coordinates per pixel sample location. The pixel shader and texture unit between them are configured to calculate texture space gradient values for one or more primitives and generate and apply per-pixel gradient scale factors configured to modify the gradient values to smoothly transition them between regions of a display device having different pixel resolutions.

First claim

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What is claimed is: 1. A computer graphics system, comprising: a graphics processing unit (GPU) having a pixel shader and a texture unit; wherein the pixel shader is configured to receive or generate one or more sets of texture coordinates per pixel sample location and wherein the pixel shader and texture unit between them are configured to calculate texture space gradient values for one or more primitives, and generate and apply per-pixel gradient scale factors configured to modify the gradient values to smoothly transition them between regions of a screen space of a display device having different pixel resolutions, wherein the regions of a screen space of a display device having different pixel resolutions include at least one region of a screen space of a display device for which a fraction of the pixels in the region are not rendered. 2. The system of claim 1 , wherein the texture space gradient values include corrections for non-orthonormality of a screen space sample distribution. 3. The system of claim 1 , wherein the texture unit is an application specific integrated circuit (ASIC), field programmable gate array (FPGA), or system on chip (SOC). 4. The system of claim 1 , wherein the texture unit is further configured to select a level of detail from a plurality of levels of detail for a texture to be applied to one or more primitives from the adjusted gradient values. 5. The system of claim 4 , wherein the texture unit is further configured to apply the texture to the one or more primitives. 6. The system of claim 5 , further comprising a display unit coupled to the GPU, wherein the display unit is configured to display images that include the texture applied to the one or more primitives. 7. The system of claim 1 , wherein the texture unit calculates texture space gradient values from the texture coordinates supplied by the pixel shader and generates and applies the per-pixel gradient scale factors to obtain scale corrected gradient values. 8. The system of claim 1 , wherein the pixel shader calculates the per-pixel gradient scale factors and provides them to the texture unit with the texture coordinates. 9. The system of claim 8 , wherein the texture unit calculates texture space gradient values from the texture coordinates supplied by the pixel shader and then applies the supplied gradient scale factors to the texture space gradients to obtain adjusted gradient values. 10. The system of claim 1 , wherein the pixel shader calculates the texture space gradients from the texture coordinates and passes them with the texture coordinates to the texture unit, wherein the pixel shader indicates to the texture unit that the texture unit must correct the texture gradient values for any non-orthonormality of the sample grid. 11. The system of claim 10 wherein the pixel shader also determines the per-pixel gradient scale factors and provides them to the texture unit, wherein the pixel shader notifies the texture unit that the texture unit must apply the gradient scale factors to the gradients to obtain the adjusted gradients. 12. The system of claim 1 , wherein the pixel shader calculates the adjusted texture gradients from the texture coordinates and passes them along with the texture space coordinates to the texture unit, wherein the pixel shader indicates to the texture unit that the adjusted gradients should be used as is to select a level of detail for a texture to be applied to a primitive. 13. In a computer graphics processing unit (GPU) having a pixel shader and a texture unit, the texture unit being implemented in hardware, a graphics processing method, comprising: the pixel shader generating one or more texture coordinates per pixel location to provide a coordinate set for one or more texture mapping operations; between the pixel shader and texture unit calculating gradient values from the texture coordinates; between the pixel shader and texture unit determining gradient scale factors configured to adjust corresponding gradient values to corresponding adjusted gradient values and between the pixel shader and texture unit applying the gradient scale factors to the gradient values, wherein the adjustment factors are configured to modify the gradient values to smoothly transition them between regions of a screen space of a display device having different pixel resolutions, wherein the regions of a screen space of a display device having different pixel resolutions include at least one region of a screen space of a display device for which a fraction of the pixels in the region are not rendered. 14. The method of claim 13 wherein the texture space gradient values include corrections for non-orthonormality of a screen space sample distribution. 15. The method of claim 13 , further comprising selecting a level of detail from a plurality of levels of detail for a texture to be applied to one or more primitives from the adjusted gradient values with the texture unit. 16. The method of claim 13 , further comprising, applying the texture to the one or more primitives with the texture unit. 17. The method of claim 16 , further comprising displaying images that include the texture applied to the one or more primitives with a display unit. 18. The method of claim 17 , wherein the pixel shader generates the texture coordinates per pixel location and provides a coordinate set for each texture mapping operation to the texture unit. 19. The method of claim 18 , wherein the texture unit calculates texture gradients from the texture coordinates supplied by the pixel shader, and generates and applies the gradient scale factors to obtain the corrected gradient values. 20. The method of claim 13 , wherein the pixel shader calculates the gradient scale factors and provides them to the texture unit with the texture coordinates. 21. The method of claim 20 , wherein the texture unit calculates texture space gradient values from the texture coordinates supplied by the pixel shader, and then applies the supplied gradient scale factors to the texture space gradients to obtain adjusted gradient values. 22. The method of claim 13 , wherein the pixel shader calculates the texture space gradients from the texture coordinates and passes them with the texture coordinates to the texture unit, wherein the pixel shader indicates to the texture unit that the texture unit must correct the texture gradient values for any non-orthonormality of the sample grid. 23. The method of claim 22 wherein the pixel shader also determines the gradient scale factors and provides them to the texture unit, wherein the pixel shader notifies the texture unit that the texture unit must apply the gradient scale factors to the gradients to obtain the adjusted gradients. 24. The method of claim 13 , wherein the pixel shader calculates the adjusted texture gradients from the texture coordinates and passes them along with the texture space coordinates to the texture unit, wherein the pixel shader indicates to the texture unit that the adjusted gradients should be used as is to select a level of detail for a texture to be applied to a primitive.

Assignees

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Classifications

  • using a cache memory · CPC title

  • Graphics controllers · CPC title

  • Special driving of display border areas · CPC title

  • Processor architectures; Processor configuration, e.g. pipelining · CPC title

  • Filling planar surfaces by adding surface attributes, e.g. adding colours or textures · CPC title

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What does patent US9652882B2 cover?
In a computer graphics processing unit (GPU) having a shader and a texture unit the pixel shader is configured to receive or generate one or more sets of texture coordinates per pixel sample location. The pixel shader and texture unit between them are configured to calculate texture space gradient values for one or more primitives and generate and apply per-pixel gradient scale factors configur…
Who is the assignee on this patent?
Sony Computer Entertainment America Llc, Sony Interactive Entertainment America Llc
What technology area does this patent fall under?
Primary CPC classification G06T15/005. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 16 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).