Apparatus and method for managing register information in a processing system

US9652259B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9652259-B2
Application numberUS-201114008196-A
CountryUS
Kind codeB2
Filing dateOct 1, 2011
Priority dateOct 1, 2011
Publication dateMay 16, 2017
Grant dateMay 16, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The setting in a configuration register is controlled based on a value stored in a management register and/or based on generation of a reset signal during a debugging operation or detection of a malfunction or power state transition in an electronic system. The management register may allocate a single bit to each configuration register, and the setting to be loaded into the configuration register is to be controlled based on the value of the bit. Additionally, or alternatively, the setting in the configuration register may be controlled when the reset signal assumes a value indicating that a default setting is to be stored.

First claim

Opening claim text (preview).

We claim: 1. An apparatus comprising: a plurality of configuration registers including at least a first configuration register and a second configuration register, the first configuration register to store settings relating to a first function, and the second configuration register to store settings relating to a second function; a management register including a plurality of bits to store values for each of the plurality of configuration registers, wherein the plurality of bits includes at least a first bit and a second bit, the first bit of the management register to correspond to the first configuration register, and the second bit of the management register to correspond to the second configuration register; and logic to change a first setting of the first configuration register to a second setting of the first configuration register, to change a first value of the first bit of the management register to a second value based on the change of the first setting to the second setting of the first configuration register, and to store the second setting at a location different from the first configuration register based on a first event, the first event being a detection of a malfunction, the logic to change a third setting of the second configuration register to a fourth setting of the second configuration register, to change a first value of the second bit of the management register to a second value based on the change of the third setting to the fourth setting of the second configuration register, and to store the fourth setting at a location different from the second configuration register based on a second event, the second event being a detection of a malfunction, wherein the management register to store the first value for the first bit when the first setting has not been changed at the first configuration register since a reference time, and the management register to store the second value for the first bit when the first setting of the first configuration register change to the second setting since the reference time, wherein the first value of the first bit to indicate that the first setting of the first configuration register has not changed from the reference time, and the second value of the first bit to indicate that the first setting of the first configuration register has changed to the second setting since the reference time. 2. The apparatus of claim 1 , wherein an operation to store the second value of the first bit is not initiated in a period between the reference time and occurrence of the first event. 3. The apparatus of claim 1 , wherein the reference time is based on a system power on. 4. The apparatus of claim 1 , wherein the reference time is based on previous performance of a system restore or recovery operation. 5. The apparatus of claim 1 , wherein the first setting for the first configuration register and the third setting of the second configuration register are pre-stored in the system before the reference time. 6. The apparatus of claim 1 , wherein the first setting for the first configuration register and the third setting for the third configuration register are deleted from the first configuration register and the second configuration register, respectively, after occurrence of the first event. 7. The apparatus of claim 1 , wherein the second setting for the first configuration register is retrieved from a storage area that pre-stored the second setting before the reference time. 8. The apparatus of claim 1 , wherein: the first setting of the first configuration register is pre-stored in a first memory before the reference time, and the second setting of the first configuration register is stored in a second memory different from the first memory after the reference time. 9. The apparatus of claim 1 , wherein the first setting and the second setting of the first configuration register are stored separately in first and second memories, respectively. 10. The apparatus of claim 1 , wherein the first value is set in a second register for a group of functions which include the first function, and wherein the setting value for at least one function in the group is not changed since the reference time. 11. The apparatus of claim 1 , wherein the second value of the first bit indicates that setting of the first configuration register has been updated since the reference time. 12. The apparatus of claim 1 , wherein the first setting of the first configuration register is a default value. 13. The apparatus of claim 1 , wherein the logic to restore the settings in the first configuration register based on logic values of the first bit of the management register. 14. The apparatus of claim 1 , comprising a first memory to store default values, and a second memory to store only settings that have changed since the reference time. 15. A non-transitory computer-readable medium to store a program for controlling information, the medium comprising: first code to store a first setting relating to a first function in a first configuration register and to store a third setting relating to a second function in a second configuration register; second code to change the first setting of the first configuration register to a second setting of the first configuration register, and to change the third setting of the second configuration register to a fourth setting of the second configuration register; third code to change a first value of a first bit of a management register to a second value based on the change of the first setting to the second setting of the first configuration register, and to change a first value of a second bit of the management register to a second value based on the change of the third setting to the fourth setting of the second configuration register; and fourth code to store the second setting at a location different from the first configuration register based on a first event, the first event being a detection of a malfunction, wherein the management register to store the first value for the first bit when the first setting has not been changed at the first configuration register since a reference time, and the management register to store the second value for the first bit when the first setting of the first configuration register change to the second setting since the reference time of the first bit, wherein the first value of the first bit to indicate that the first setting of the first configuration register has not changed from the reference time, and the second value of the first bit to indicate that the first setting of the first configuration register has changed to the second setting since the reference time. 16. The medium of claim 15 , wherein an operation to store the second value of the first bit is not initiated in a period between the reference time and occurrence of the first event. 17. The medium of claim 15 , wherein the reference time is based on a system power on. 18. The medium of claim 15 , wherein the reference time is based on previous performance of a system restore or recovery operation. 19. The medium of claim 15 , wherein the first setting of the first configuration register and the third setting of the second configuration register is pre-stored in the system before the reference time. 20. A method for controlling information, comprising: storing a first setting relating to a first function in a first configuration register; storing a third setting relating to a second function in a second configuration register; changing the first setting of th

Assignees

Inventors

Classifications

  • Resetting or repowering · CPC title

  • Configuring for program initiating, e.g. using registry, configuration files · CPC title

  • Cross-Sectional Technologies · mapped topic

  • Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

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Frequently asked questions

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What does patent US9652259B2 cover?
The setting in a configuration register is controlled based on a value stored in a management register and/or based on generation of a reset signal during a debugging operation or detection of a malfunction or power state transition in an electronic system. The management register may allocate a single bit to each configuration register, and the setting to be loaded into the configuration regis…
Who is the assignee on this patent?
Fanning Blaise, Sabbavarapu Anil K, Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F9/44505. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 16 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).