Digital self-interference residual cancellation

Patent metadata

Field	Value
Publication number	US-9647705-B2
Application number	US-201514982428-A
Country	US
Kind code	B2
Filing date	Dec 29, 2015
Priority date	Jul 16, 2015
Publication date	May 9, 2017
Grant date	May 9, 2017

Abstract

The present application a digital self-interference residual cancellation method that adjusts a magnitude of a sampled transmit signal based on compared magnitude and phases associated with tones. The digital self-interference residual cancellation method may follow an analog carrier cancellation stage where the digital self-interference residual cancellation is based on a determination of the channel circuit response used to control an infinite impulse response filter which can compensate using both poles and zeroes.

First claim

What is claimed is:

1. A digital self-interference residual cancellation method, the method comprising:
determining a first magnitude and a first phase of a tone in a receive signal;
determining a second magnitude and a second phase of the tone in a sampled transmit signal;
comparing the first magnitude with the second magnitude;
comparing the first phase with the second phase;
adjusting a magnitude of the sampled transmit signal based on the comparing of the first magnitude with the second magnitude; and
adjusting a phase of the sampled transmit signal based on the comparing of the first phase with the second phase.

2. The digital self-interference residual cancellation method of claim 1 , wherein the determining of the first magnitude and the first phase is based on a Fast Fourier transform of the tone.

3. The digital self-interference residual cancellation method of claim 1 , wherein the adjusting of the phase of the sampled transmit signal is based on the use of a phase loop filter.

4. The digital self-interference residual cancellation method of claim 1 , wherein the adjusting of the magnitude of the sampled transmit signal is based on the use of a gain loop filter.

5. The digital self-interference residual cancellation method of claim 1 , wherein the sampled transmit signal is an output of an infinite impulse response filter.

6. The digital self-interference residual cancellation method of claim 1 , further comprising calibrating a coefficient of the infinite impulse response filter.

7. The digital self-interference residual cancellation method of claim 1 , wherein the calibrating of a coefficient of the infinite impulse response filter is based on the use of a controller.

8. The digital self-interference residual cancellation method of claim 1 , wherein the sampled transmit signal is phase shifted to remove interference from the receive signal.

9. A device comprising:
a processor; and
a memory coupled with the processor, the memory comprising executable instructions that when executed by the processor cause the processor to effectuate operations comprising:
determining a first magnitude and a first phase of a tone in a receive signal;
determining a second magnitude and a second phase of the tone in a sampled transmit signal;
comparing the first magnitude with the second magnitude;
comparing the first phase with the second phase;
adjusting a magnitude of the sampled transmit signal based on the comparing of the first magnitude with the second magnitude; and
adjusting a phase of the sampled transmit signal based on the comparing of the first phase with the second phase.

10. The device of claim 9 , wherein the determining of the first magnitude and the first phase is based on a Fast Fourier transform of the tone.

11. The device of claim 9 , wherein the adjusting of the phase of the sampled transmit signal is based on the use of a phase loop filter.

12. The device of claim 9 , wherein the adjusting of the magnitude of the sampled transmit signal is based on the use of a gain loop filter.

13. The device of claim 9 , wherein the sampled transmit signal is an output of an infinite impulse response filter.

14. The device of claim 9 , the operations further comprising calibrating a coefficient of the infinite impulse response filter.

15. The device of claim 9 , the operations further comprising calibrating of a coefficient of the infinite impulse response filter based on the use of a controller.

16. The device of claim 9 , wherein the sampled transmit signal is phase shifted to remove interference from the receive signal.

17. A non-transitory computer readable storage medium comprising computer executable instructions that when executed by a computing device cause said computing device to effectuate operations comprising:
determining a first magnitude and a first phase of a tone in a receive signal;
determining a second magnitude and a second phase of the tone in a sampled transmit signal;
comparing the first magnitude with the second magnitude;
comparing the first phase with the second phase;
adjusting a magnitude of the sampled transmit signal based on the comparing of the first magnitude with the second magnitude; and
adjusting a phase of the sampled transmit signal based on the comparing of the first phase with the second phase.

18. The non-transitory computer readable storage medium of claim 17 , wherein the adjusting of the phase of the sampled transmit signal is based on the use of a phase loop filter.

19. The non-transitory computer readable storage medium of claim 17 , wherein the adjusting of the magnitude of the sampled transmit signal is based on the use of a gain loop filter.

20. The non-transitory computer readable storage medium of claim 17 , wherein the sampled transmit signal is an output of an infinite impulse response filter.

Assignees

• LGS Innovations LLC

Inventors

• Pack Riley Nelson
• Brannon Alan Scott
• Baker Benjamin Joseph

Classifications

• H04L25/0212

  of impulse response · CPC title

• H04L25/025

  using least-mean-square [LMS] method · CPC title

• H04L5/1461 Primary

  Suppression of signals in the return path, i.e. bidirectional control circuits · CPC title

• H04B2001/0408

  with power amplifiers · CPC title

• H04B1/713

  using frequency hopping · CPC title