Electrified vehicle and method of controlling same
US-2024424930-A1 · Dec 26, 2024 · US
US9647556B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9647556-B2 |
| Application number | US-201414326196-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 8, 2014 |
| Priority date | Jul 8, 2014 |
| Publication date | May 9, 2017 |
| Grant date | May 9, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
In a controller for a DC to DC converter, PWM signal generating circuitry generates a set of PWM signals phase-shifted relative to one another, and controls states of the PWM signals according to a set of control signals. Each PWM signal of the PWM signals has an on-time state and an off-time state. Ramp signal generating circuitry, coupled to the PWM signal generating circuitry, generates a set of ramp signals having substantially the same ramp slope. Each ramp signal of the ramp signals is generated in response to detecting an on-time state of a corresponding PWM signal of the PWM signals. Additionally, a comparing circuit, coupled to the PWM and ramp signal generating circuitry, alternately compares the ramp signals with a preset reference to generate the control signals. A corresponding control signal of the control signals changes the corresponding PWM signal from the on-time state to an off-time state.
Opening claim text (preview).
What is claimed is: 1. A controller for a DC to DC converter, comprising: pulse width modulated (PWM) signal generating circuitry operable for generating a plurality of PWM signals phase-shifted relative to one another, and operable for controlling states of said PWM signals according to a plurality of control signals, each PWM signal of said PWM signals having an on-time state and an off-time state; ramp signal generating circuitry, coupled to said PWM signal generating circuitry, operable for generating a plurality of ramp signals having substantially the same ramp slope, each ramp signal of said ramp signals generated in response to detecting an on-time state of a corresponding PWM signal of said PWM signals; and a comparing circuit, coupled to said PWM signal generating circuitry and said ramp signal generating circuitry, operable for alternately comparing said ramp signals with a preset reference to generate said control signals, a corresponding control signal of said control signals operable for changing said corresponding PWM signal from said on-time state to an off-time state, wherein said PWM signal generating circuitry generates a plurality of trigger signals and controls said corresponding PWM signal to be in said on-time state on detection of a corresponding trigger signal in said trigger signals, and wherein each trigger signal of said trigger signals indicates a situation in which an output voltage of said DC to DC converter is less than a reference voltage. 2. The controller as claimed in claim 1 , wherein said ramp signal generating circuitry comprises: a plurality of capacitive components; and switch circuitry, coupled to said capacitive components, operable for delivering a plurality of currents to charge said capacitive components to generate said ramp signals at said capacitive components, wherein said ramp slope is determined by a capacitance of a capacitive component of said capacitive components and a current of said currents that charges said capacitive component. 3. The controller as claimed in claim 2 , wherein said ramp signal generating circuitry further comprises: a select circuit, coupled to said capacitive components, operable for selecting a ramp signal of said ramp signals to be output to said comparing circuit according to said corresponding PWM signal. 4. The controller as claimed in claim 3 , wherein said ramp signal generating circuitry, in response to said on-time state of said corresponding PWM signal, controls said switch circuitry to allow a current to charge a corresponding capacitive component that provides the selected ramp signal, and wherein said ramp signal generating circuitry, in response to said corresponding control signal, controls said switch circuitry to discharge said corresponding capacitive component. 5. The controller as claimed in claim 1 , wherein said ramp signal generating circuitry starts to increase a corresponding ramp signal of said ramp signals in response to said on-time state of said corresponding PWM signal, and wherein said comparing circuit generates said corresponding control signal when said corresponding ramp signal increases to said preset reference. 6. The controller as claimed in claim 1 , wherein said PWM signal generating circuitry is operable for generating said PWM signals to control a plurality of switching circuits, and each switching circuit of said switching circuits is coupled to an inductive component and operable for allowing a current to flow through said inductive component. 7. The controller as claimed in claim 6 , wherein when said corresponding PWM signal is in said on-time state, a corresponding switching circuit of said switching circuits controls a current flowing through a corresponding inductive component to increase, and wherein said PWM signal generating circuitry controls said corresponding PWM signal to be in said on-time state during an on-time interval, and controls said PWM signals to have substantially the same on-time interval by controlling said ramp signals to have said substantially the same ramp slope and by comparing said ramp signals with said preset reference. 8. The controller as claimed in claim 7 , wherein said controller is operable for balancing currents flowing through the inductive components coupled to said switching circuits by controlling said PWM signals to have said substantially the same on-time interval. 9. A method for controlling a DC to DC converter, said method comprising: generating a plurality of pulse width modulated (PWM) signals phase-shifted relative to one another using PWM signal generating circuitry, each PWM signal of said PWM signals having an on-time state and an off-time state; generating a plurality of ramp signals having substantially the same ramp slope, each ramp signal of said ramp signals generated in response to detecting an on-time state of a corresponding PWM signal of said PWM signals; alternately comparing said ramp signals with a preset reference to generate a plurality of control signals, using a comparing circuit coupled to said PWM signal generating circuitry; changing said corresponding PWM signal from said on-time state to an off-time state according to a corresponding control signal of said control signals; generating a plurality of trigger signals, each trigger signal of said trigger signals indicates a situation in which an output voltage of said DC to DC converter is less than a reference voltage; and controlling said corresponding PWM signal to be in said on-time state on detection of a corresponding trigger signal in said trigger signals. 10. The method as claimed in claim 9 , wherein said generating a plurality of ramp signals comprises: delivering, using switch circuitry, a plurality of currents to charge a plurality of capacitive components to generate said ramp signals at said capacitive component, said delivering comprising: controlling said switch circuitry to allow a current to charge a corresponding capacitive component of said capacitive components in response to said on-time state of said corresponding PWM signal; and controlling said switch circuitry to discharge said corresponding capacitive component in response to said corresponding control signal. 11. The method as claimed in claim 10 , wherein said ramp slope is determined by a capacitance of said corresponding capacitive component and said current. 12. The method as claimed in claim 9 , further comprising: starting to increase a corresponding ramp signal of said ramp signals in response to said on-time state of said corresponding PWM signal; and generating said corresponding control signal when said corresponding ramp signal increases to said preset reference. 13. The method as claimed in claim 9 , further comprising: controlling a plurality of switching circuits using said PWM signals, each switching circuit of said switching circuits coupled to an inductive component and operable for allowing a current to flow through said inductive component; and balancing currents flowing through the inductive components coupled to said switching circuits based on said comparing said ramp signals with said preset reference. 14. The method as claimed in claim 9 , further comprising: controlling a plurality of currents, flowing through a plurality of inductive components respectively, according to said PWM signals; increasing a current flowing through a corresponding inductive component of said inductive components when said corresponding PWM signal is in said on-time state; controlling said corresponding PWM signal to be in said on-time state during an on-time interval; and controlling said
with a plurality of power processing stages connected in parallel · CPC title
Electricity · mapped topic
Means for starting or stopping converters · CPC title
Electricity · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Answers are generated from the same data shown on this page.