DC-DC converter
US-9195247-B2 · Nov 24, 2015 · US
US9647549B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9647549-B2 |
| Application number | US-201514698523-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 28, 2015 |
| Priority date | Dec 25, 2014 |
| Publication date | May 9, 2017 |
| Grant date | May 9, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A DC-to-DC converter comprises a first switch, a second switch coupled to the first switch, an inductor, and a plurality of serially connected power transistors. The first switch is to couple an input voltage to a common node. The first and second switches to be turned on and off in a reciprocating manner so as to couple either the input voltage or ground to the common node. The inductor, connecting the common node to an output voltage node of the DC-to-DC converter, is configured to control a voltage at the output voltage node based on current flowing through the inductor. The plurality of power transistors are concurrently controlled by a first signal that is based on a value of a voltage at the common node and a supply voltage, the serially connected power transistors to control an amount of current flowing through the inductor. Moreover, the first signal is used to prevent a high voltage drop from overstressing the plurality of power transistors while the first switch is on.
Opening claim text (preview).
What is claimed is: 1. A DC-to-DC converter, comprising: a high side switch connected to an input voltage and a common node and , if on, the high side switch provides a signal path through the high side switch and through the common node to an output voltage node of the DC-to-DC converter; a low side switch connected to ground and the common node and, if on, the low side switch provides a signal path through the low side switch and through the common node to the output voltage node of the DC-to-DC converter; and a plurality of power transistors, coupled to the common node, the power transistors to control a first current flowing through an inductor connecting the common node to the output voltage node based on a second current provided by a current source and a value of a conductive resistance of the plurality of power transistors, wherein the first current determines an output voltage at the output voltage node of the DC-to-DC converter; wherein each of the plurality of the power transistors is configured to be on both when the high side switch is on and when the low side switch is on, and each of the plurality of the power transistors is controlled by the high side switch and the low side switch concurrently so as to prevent a high voltage drop from overstressing the plurality of the power transistors while the high side switch is on. 2. The DC-to-DC converter of claim 1 wherein the high side switch and the low side switch are respectively controlled by a high side pulse width modulated signal and a low side pulse width modulated signal so as to cause the high side switch and the low side switch to be turned on alternately. 3. The DC-to-DC converter of claim 1 further comprising a virtual ground amplifier (VGA) and a VGA power transistor coupled to a first input of the virtual ground amplifier, wherein the VGA power transistor is configured to block a high voltage drop from reaching the first input of the virtual ground amplifier while the high side switch is on. 4. The DC-to-DC converter of claim 3 wherein the VGA power transistor is to be controlled by the low side pulse width modulated signal. 5. The DC-to-DC converter of claim 1 wherein the plurality of transistors include isolated laterally diffused metal oxide semiconductor (LDMOS) transistors. 6. The DC-to-DC converter of claim 1 wherein the plurality of power transistors controls the first current while the low side switch is on. 7. The DC-to-DC converter of claim 1 wherein the power transistor's characteristic includes a value of the power transistor's conductance resistance. 8. A DC-to-DC converter, comprising: a first switch to couple an input voltage to a common node; a second switch coupled to the first switch, the first and second switches to be turned on and off in a reciprocating manner so as to couple either the input voltage or ground to the common node; an inductor connecting the common node to an output voltage node of the DC-to-DC converter, to control a voltage at the output voltage node based on current flowing through the inductor; and a plurality of serially connected power transistors concurrently controlled by a first signal that is based on a value of a voltage at the common node and a supply voltage, the serially connected power transistors to control an amount of current flowing through the inductor; wherein the first signal is used to prevent a high voltage drop from overstressing the plurality of power transistors while the first switch is on; and wherein each gate of the plurality of serially connected power transistors is controlled by a boot voltage such that each of the plurality of serially connected power transistors is configured to be on while the first switch is on and while the second switch is on. 9. The DC-to-DC converter of claim 8 wherein the first and the second switches are controlled by first and second pulse width modulated signals respectively. 10. The DC-to-DC converter of claim 8 wherein the amount of current flowing through the inductor is determined by conductance resistances of each of the plurality of power transistors and the second switch, and a current source coupled to the plurality of power transistors. 11. The DC-to-DC converter of claim 8 wherein the first signal used to control the plurality of power transistors includes a square wave transitioning between a low voltage and a high voltage, wherein a value of the high voltage is based on the voltage supply and a voltage drop across a capacitor connecting between the voltage supply and the common node and a value of the low voltage is the voltage drop across the capacitor. 12. The DC-to-DC converter of claim 8 wherein the plurality of transistors include isolated laterally diffused metal oxide semiconductor (LDMOS) transistors. 13. The DC-to-DC converter of claim 8 further comprising a virtual ground amplifier and an additional power transistor connecting one of the plurality of the power transistors to an input of the virtual ground amplifier, wherein the additional power transistor is configured to block a high voltage drop from the input of the virtual ground amplifier. 14. A method, comprising: alternately switching on a high side switch and a low side switch of a DC-to-DC converter; controlling a plurality of power transistors coupled to the low side switch, based on a signal that includes a value of a constant voltage plus a value of a voltage at a common node connecting to the high side and low side switches, each of the plurality of power transistors configured to be on while the high side switch is on and while the low side switch is on; controlling, by the plurality of the power transistors, a voltage drop across the plurality of the power transistors, based on a value of conductance resistance of the plurality of the power transistors; and generating, based on the controlled voltage drop, a value of current flowing through an inductor connecting the common node and an output voltage node of the DC-to-DC converter. 15. The method of claim 14 wherein the value of the constant voltage includes a value of a voltage drop across a capacitor that connects to the common node and a voltage supply. 16. The method of claim 14 wherein the alternately switching is based on first and second pulse width modulated (PWM) signals, each of the first and second PWM signals includes a square wave. 17. The method of claim 16 wherein the square wave of the second pulse (PWM) signal includes a value of a higher voltage nearly equivalent to the value of the voltage drop across the capacitor.
including plural semiconductor devices as final control devices for a single load · CPC title
Electricity · mapped topic
Devices or circuits for detecting current in a converter · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.