Electronic device including laterally arranged P-type and N-type regions in a two dimensional (2D) material layer and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9647166-B2
Application number	US-201414554363-A
Country	US
Kind code	B2
Filing date	Nov 26, 2014
Priority date	May 21, 2014
Publication date	May 9, 2017
Grant date	May 9, 2017

Abstract

According to example embodiments, an electronic device includes a substrate, an insulating layer on the substrate, and a diode layer on the insulating layer. The diode layer includes a two dimensional (2D) material layer. The 2D material layer includes an N-type region and a P-type region. According to example embodiments, a method of manufacturing an electronic device includes forming an insulating film on a substrate, forming a 2D material layer on the insulating film, and dividing the 2D material layer into an N-type region and a P-type region.

First claim

What is claimed is:

1. An electronic device comprising:
a substrate;
an insulating film on the substrate;
a diode layer on the insulating film,
the diode layer including a two dimensional (2D) material layer comprising a monolayer crystalline material, and
the 2D material layer including an N-type region and a P-type region that are arranged laterally to each other, and
a thickness of the N-type region being equal to a thickness of the P-type region; and

particles on the P-type region of the 2D material layer,
wherein the particles include metal particles, and the metal particles are not arranged on the N-type region of the 2D material layer.

2. The electronic device of claim 1 , further comprising:
a mask layer on the N-type region.

3. The electronic device of claim 2 , wherein
the mask layer includes a 2D material comprising a monolayer crystalline material, and
the 2D material in the mask layer is a hexagonal-boron nitride (h-BN) layer or a mica layer.

4. The electronic device of claim 1 , wherein the metal particles configured to act as a plasmonic nanostructure.

5. The electronic device of claim 1 , wherein the diode layer includes a transition metal dichalcogenide (TMDC) layer.

6. The electronic device of claim 1 , wherein electrodes are respectively formed on the N-type region and the P-type region.

7. A method of manufacturing an electronic device, the method comprising:
forming an insulating film on a substrate;
forming a 2D material layer comprising a monolayer crystalline material on the insulating film; and
dividing the 2D material layer into an N-type region and a P-type region, the dividing the 2D material layer into the N-type region and the P-type region including,
forming first and second electrodes on the 2D material layer, the first and second electrode being separated from each other, and
transforming a portion of the 2D material layer between the first and second electrodes into the P-type region, the transforming the portion of the 2D material layer including,
covering a region corresponding to the N-type region of the 2D material layer with a mask layer, and
covering a region corresponding to the P-type region of the 2D material layer with a sol-gel layer.

8. The method claim 7 , wherein the 2D material layer includes a transition metal dichalcogenide (TMDC) layer.

9. The method claim 7 , wherein the covering the region corresponding to the P-type region with the sol-gel layer includes:
coating the sol-gel layer on the 2D material layer to cover the first electrode, second electrode, and mask layer, on the 2D material layer; and
removing the sol-gel layer except for a portion of the sol-gel layer covering the region corresponding to the P-type region.

10. The method claim 7 , wherein
the mask layer includes a 2D material comprising a monolayer crystalline material, and
the 2D material is a non-conductive material layer having a band gap of 5 eV or more.

11. The method claim 7 , wherein the mask layer includes an h-BN layer or a mica layer.

12. The method claim 7 , wherein the sol-gel layer includes a component that combines with electrons in the 2D material layer.

13. The method claim 12 , wherein the component includes Au.

14. A method of manufacturing an electronic device, the method comprising:
forming an insulating film on a substrate;
forming a 2D material layer comprising a monolayer crystalline material on the insulating film, the 2D material layer having an N-type characteristic; and
forming a P-type region in a part of the 2D material layer by forming particles on a top surface of the 2D material layer, a remaining part of the 2D material layer being an N-type region,
wherein the N-type region and the P-type region are in contact with the insulating film.

15. The method of claim 14 , wherein the forming the P-type region includes:
forming first and second electrodes on the 2D material layer, the first and second electrode being separated from each other; and
transforming a portion of the 2D material layer between the first and second electrodes into the P-type region.

16. The method of claim 14 , wherein
the forming the P-type region includes forming metal particles on the part of the 2D material layer, and
the metal particles are not formed on the N-type region.

17. The method of claim 14 , wherein a thickness of the P-type region is equal to a thickness of the N-type region.

Assignees

• Samsung Electronics Co Ltd
• Res & Business Found Sungyunkwan Univ

Inventors

• Choi Minsup
• Yoo Wonjong
• Qu Deshun
• Ra Changho
• Liu Xiaochi
• Lee Seunghwan
• Lee Jia

Classifications

• H01L31/054

  Electricity · mapped topic

• Y02E10/52

  PV systems with concentrators · CPC title

• H01L31/18 Primary

  Electricity · mapped topic

• H01L31/032

  Electricity · mapped topic

• H01L31/022425

  Electricity · mapped topic