Semiconductor device

Patent metadata

Field	Value
Publication number	US-9647129-B2
Application number	US-201514755670-A
Country	US
Kind code	B2
Filing date	Jun 30, 2015
Priority date	Jul 4, 2014
Publication date	May 9, 2017
Grant date	May 9, 2017

Abstract

To provide a semiconductor device which occupies a small area and is highly integrated. The semiconductor device includes an oxide semiconductor layer, an electrode layer, and a contact plug. The electrode layer includes one end portion in contact with the oxide semiconductor layer and the other end portion facing the one end portion. The other end portion includes a semicircle notch portion when seen from the above. The contact plug is in contact with the semicircle notch portion.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first insulating layer;
an oxide semiconductor layer over the first insulating layer;
an electrode layer;
a second insulating layer over and in contact with the electrode layer; and
a contact plug,
wherein the electrode layer includes a first end portion and a second end portion,
wherein the first end portion is in contact with the oxide semiconductor layer,
wherein the second end portion includes a semicircle notch portion when seen from the above,
wherein the contact plug is in contact with the semicircle notch portion, and
wherein the contact plug penetrates the first insulating layer.

2. The semiconductor device according to claim 1 ,
wherein the contact plug includes a region in contact with an upper surface of the electrode layer.

3. The semiconductor device according to claim 1 ,
wherein the oxide semiconductor layer comprises In, Zn, and M (M is Al, Ti, Sn, Ga, Y, Zr, La, Ce, Nd, or Hf).

4. An electronic device comprising:
the semiconductor device according to claim 1 ; and
at least one of a display device, a housing, a microphone, a speaker, an operation key, a camera, and a lens.

5. A semiconductor device comprising:
a first insulating layer;
an oxide semiconductor layer over the first insulating layer;
an electrode layer;
a second insulating layer over and in contact with the electrode layer; and
a contact plug,
wherein the electrode layer is in contact with an upper surface of the oxide semiconductor layer,
wherein an end portion of the electrode layer and an end portion of the oxide semiconductor layer overlap with each other in a region,
wherein the end portions each include a semicircle notch portion when seen from the above,
wherein the contact plug is in contact with the semicircle notch portion, and
wherein the contact plug penetrates the first insulating layer.

6. The semiconductor device according to claim 5 ,
wherein the contact plug includes a region in contact with an upper surface of the electrode layer.

7. The semiconductor device according to claim 5 ,
wherein the oxide semiconductor layer comprises In, Zn, and M (M is Al, Ti, Sn, Ga, Y, Zr, La, Ce, Nd, or Hf).

8. An electronic device comprising:
the semiconductor device according to claim 5 ; and
at least one of a display device, a housing, a microphone, a speaker, an operation key, a camera, and a lens.

9. A semiconductor device comprising:
a first transistor;
a first insulating layer over the first transistor;
a second transistor over the first transistor; and
a contact plug,
wherein the first transistor includes a channel formation region in a silicon substrate,
wherein the second transistor includes an oxide semiconductor layer and a second insulating layer over the oxide semiconductor layer,
wherein the first transistor and the second transistor overlap with each other,
wherein one of a source region and a drain region of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor through the contact plug,
wherein one or both of the source electrode and the drain electrode of the second transistor include a first end portion and a second end portion,
wherein the second insulating layer is provided over and in contact with one or both of the source electrode and the drain electrode of the second transistor,
wherein the first end portion is in contact with the oxide semiconductor layer,
wherein the second end portion includes a semicircle notch portion when seen from the above, and
wherein the contact plug is in contact with the semicircle notch portion and penetrates the first insulating layer.

10. The semiconductor device according to claim 9 ,
wherein the first transistor and the second transistor form a CMOS circuit.

11. The semiconductor device according to claim 9 ,
wherein the oxide semiconductor layer comprises In, Zn, and M (M is Al, Ti, Sn, Ga, Y, Zr, La, Ce, Nd, or Hf).

12. An electronic device comprising:
the semiconductor device according to claim 9 ; and
at least one of a display device, a housing, a microphone, a speaker, an operation key, a camera, and a lens.

Assignees

• Semiconductor Energy Lab

Inventors

• Kurata Motomu
• Hodo Ryota
• Sasagawa Shinya
• Hata Yuki

Classifications

• H10W20/40

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

• H01L2924/00

  Electricity · mapped topic

• H01L27/1156

  Electricity · mapped topic

• H01L27/0688

  Electricity · mapped topic