High-pressure anneal

Patent metadata

Field	Value
Publication number	US-9646850-B2
Application number	US-201514791784-A
Country	US
Kind code	B2
Filing date	Jul 6, 2015
Priority date	Jul 6, 2015
Publication date	May 9, 2017
Grant date	May 9, 2017

Abstract

A method of treating a semiconductor device is provided including the steps of loading the semiconductor device in a processing chamber, pressurizing the processing chamber by supplying a processing gas from a pressure chamber to the processing chamber, performing a thermal anneal of the semiconductor device in the processing chamber, and depressurizing the processing chamber by supplying the processing gas from the processing chamber to the pressure chamber.

First claim

What is claimed:

1. A method of treating a semiconductor device, the method comprising:
loading said semiconductor device in a processing chamber;
pressurizing said processing chamber by supplying a processing gas from a pressure chamber to said processing chamber;
performing a thermal anneal of said semiconductor device in said pressurized processing chamber in the presence of said processing gas; and
depressurizing said pressurized processing chamber after performing said thermal anneal by supplying said processing gas from said processing chamber back to said pressure chamber.

2. The method of claim 1 , wherein said processing chamber is pressurized up to a pressure of more than one of 5 atm, 10 atm, 15 atm and 20 atm.

3. The method of claim 1 , wherein said processing chamber is connected to said pressure chamber via a conduction line including a valve, the method further comprising opening said valve during said pressurizing of said processing chamber, closing said valve during said performing of said thermal anneal and opening said valve during said depressurizing of said pressurized processing chamber.

4. The method of claim 1 , further comprising purging said processing chamber before said step of pressurizing of said processing chamber and wherein said purging comprises supplying a purge gas to said processing chamber from a purge gas source different from said pressure chamber.

5. The method of claim 1 , further comprising pressurizing said processing gas in said pressure chamber before pressurizing said processing chamber.

6. The method of claim 1 , wherein said processing gas comprises deuterium.

7. A method of manufacturing a semiconductor device comprising a high-k metal gate transistor device, the method comprising:
forming a high-k dielectric layer on a semiconductor layer;
forming a metal-containing layer of material on said high-k dielectric layer;
performing an anneal treatment of said semiconductor device, said anneal treatment comprising:
loading said semiconductor device in a processing chamber; pressurizing said processing chamber by supplying a processing gas from a pressure chamber to said processing chamber; performing a thermal anneal of said semiconductor device in said pressurized processing chamber in the presence of said processing gas;
and depressurizing said pressurized processing chamber after performing said thermal anneal by supplying said processing gas from said processing chamber back to said pressure chamber.

8. The method of claim 7 , wherein said processing chamber is pressurized to a pressure of at least 5 atm.

9. The method of claim 7 , wherein said processing gas comprises deuterium.

10. The method of claim 7 , wherein said anneal treatment is performed before forming said metal-containing layer of material on said high-k dielectric layer.

11. The method of claim 7 , wherein said anneal treatment is performed after forming said metal-containing layer of material on said high-k dielectric layer.

12. The method of claim 7 , further comprising forming source and drain regions at least partly in said semiconductor layer, wherein said thermal anneal of said semiconductor device is performed after said forming said source and drain regions.

13. The method of claim 12 , further comprising forming a gate electrode above said high-k dielectric and forming contacts to said source and drain regions and said gate electrode, wherein said thermal anneal of said semiconductor device is performed after forming said contacts.

14. A method of treating a semiconductor device including a semiconductor layer and an insulating layer formed on a surface of said semiconductor layer, the method comprising:
loading said semiconductor device in a processing chamber;
pressurizing said processing chamber by supplying a processing gas comprising deuterium from a pressure chamber to said processing chamber such that said processing chamber has a pressure of at least 5 atm;
performing a thermal anneal of said semiconductor device in said pressurized processing chamber to form a concentration of deuterium of said processing gas comprising deuterium at an interface of said semiconductor layer and said insulating layer; and
depressurizing said pressurized processing chamber after performing said thermal anneal by supplying said processing gas comprising deuterium from said processing chamber back.to said pressure chamber.

15. An apparatus for performing a high-pressure anneal of a semiconductor device, the apparatus comprising:
a processing chamber;
a pressure chamber;
a conduction line connecting said processing chamber and said pressure chamber; and
a control unit configured to control:
pressurization of said processing chamber by supply of a processing gas from said pressure chamber to said processing chamber;
thermal annealing of said semiconductor device in said pressurized processing chamber in the presence of said processing gas; and
depressurization of said pressurized processing chamber after performing said thermal anneal by supply of said processing gas from said processing chamber back to said pressure chamber.

16. The apparatus of claim 15 , further comprising a heating device installed in said processing chamber.

17. The apparatus of claim 15 , further comprising a pressurization means installed in said pressure chamber.

18. The apparatus of claim 15 , further comprising a purge line different from said conduction line and wherein said control unit is configured to control purging of said processing chamber by supplying a purge gas to said processing chamber via said purge line.

19. The apparatus of claim 15 , further comprising an exhaust line different from said conduction line and wherein said control unit is configured to control exhausting of gas of said processing chamber during purging of said processing chamber.

20. The apparatus of claim 15 , wherein a volume of said processing chamber is at most one of ½, ⅓, ¼, 1/10 and 1/20 of a volume of said pressure chamber.

Assignees

• Globalfoundries Inc

Inventors

• Pethe Wieland
• Noack Dirk
• Kallauch Bernd

Classifications

• H10P72/0431

  Apparatus for thermal treatment · CPC title

• H10D64/0134

  with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor · CPC title

• H10P95/90 Primary

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P72/0462

  characterised by the construction of the processing chambers, e.g. modular processing chambers · CPC title

• H10D64/01338

  with a treatment, e.g. annealing, after the formation of the conductor · CPC title