Voltage regulator

Patent metadata

Field	Value
Publication number	US-9639101-B2
Application number	US-201514664361-A
Country	US
Kind code	B2
Filing date	Mar 20, 2015
Priority date	Mar 25, 2014
Publication date	May 2, 2017
Grant date	May 2, 2017

Abstract

To provide a voltage regulator capable of maintaining the accuracy of an output voltage even if it is set to an arbitrary output voltage. A voltage regulator includes an output transistor comprised of an NMOS transistor having a backgate grounded, an error amplifier circuit configured to amplify and output a difference between a divided voltage obtained by dividing an output voltage outputted from the output transistor and a reference voltage and thereby to control a gate of the output transistor, a constant voltage circuit, and a transistor having a gate inputted with a voltage of the constant voltage circuit, a drain connected to the gate of the output transistor, and a source connected to a source of the output transistor.

First claim

What is claimed is:

1. A voltage regulator comprising an output transistor comprised of an NMOS transistor having a backgate grounded, and an error amplifier circuit having a first amplification stage inputted with a divided voltage obtained by dividing an output voltage outputted from the output transistor and a reference voltage, a second amplification stage configured to control the output transistor, and a first transistor of the second amplification stage configured to allow a separately supplied bias current to flow at an input of the first transistor and a drain of the first transistor subsequently bias a gate of the output transistor, said voltage regulator comprising:
a constant voltage circuit;
a second transistor having a gate inputted with a voltage of the constant voltage circuit and a source connected to a source of the output transistor; and
a current mirror circuit having an input connected to a drain of the second transistor, and an output connected to a gate of the first transistor.

2. The voltage regulator according to claim 1 , further including:
a third transistor of the current mirror circuit having a gate connected to the drain of the second transistor, and
a constant current circuit connected to a drain of the third transistor,
wherein a phase compensation circuit of the error amplifier circuit is adjusted by a voltage at a connecting point of the drain of the third transistor and the constant current circuit.

Assignees

• Seiko Instr Inc
• Sii Semiconductor Corp

Inventors

• Suzuki Teruo

Classifications

• G05F1/56 Primary

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

• G05F1/575

  characterised by the feedback circuit · CPC title