Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US9635756B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9635756-B2 |
| Application number | US-201314032093-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 19, 2013 |
| Priority date | Sep 21, 2012 |
| Publication date | Apr 25, 2017 |
| Grant date | Apr 25, 2017 |
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Disclosed herein is a manufacturing method of a circuit board. The manufacturing method includes a first step for preparing a prepreg in which a core material is impregnated with an uncured resin. The prepreg has a through-hole surrounded by the core material and the resin so as to penetrate through the core material and the resin. The manufacturing method further includes a second step for housing a semiconductor IC in the through-hole, and a third step for pressing the prepreg so that a part of the resin flows into the through-hole to allow the semiconductor IC housed in the through-hole to be embedded in the resin.
Opening claim text (preview).
What is claimed is: 1. A circuit board comprising: a resin substrate including a core section including a core material that is impregnated with a resin and a housing section filled by the resin, the housing section being separate from the core section and surrounded by the core section so as to penetrate through the core section; and a semiconductor integrated circuit (IC) embedded in the resin that fills the housing section, wherein a thickness of the housing section is less than a thickness of the core section, thereby at least one of one and other surfaces of the resin substrate has a dented shape in the housing section. 2. The circuit board as claimed in claim 1 , further comprising: a wiring layer formed on the one surface of the resin substrate and electrically connected to an external terminal of the semiconductor IC; and a resist film covering the wiring layer. 3. The circuit board as claimed in claim 2 , wherein the other surface of the resin substrate is free from any wiring layer. 4. The circuit board as claimed in claim 1 , wherein the semiconductor IC includes a main surface where an external terminal is provided and a back surface opposite to the main surface, a first portion of one of the main and back surfaces of the semiconductor IC is covered with an adhesive agent, and a second portion of the one of the main and back surfaces of the semiconductor IC is covered with the resin. 5. The circuit board as claimed in claim 4 , wherein the other of the main and back surfaces of the semiconductor IC is entirely covered with the resin. 6. The circuit board as claimed in claim 4 , wherein the semiconductor IC has a side surface that is free from the adhesive agent. 7. The circuit board as claimed in claim 1 , wherein the semiconductor IC includes a main surface where an external terminal is provided and a back surface opposite to the main surface, one of the main and back surfaces of the semiconductor IC is partially covered with the resin, and the other of the main and back surfaces of the semiconductor IC is entirely covered with the resin. 8. A circuit board comprising: a resin substrate including a core section including a core material that is impregnated with a resin and a housing section filled by the resin, the housing section being separate from the core section and surrounded by the core section so as to penetrate through the core section; a semiconductor integrated circuit (IC) embedded in the housing section, the semiconductor IC including an external terminal; and a wiring layer formed on a first surface of the resin substrate over the core section and the housing section, wherein the housing section of the resin substrate has a via hole that exposes the external terminal of the semiconductor IC, and wherein a part of the wiring layer is embedded in the via hole to electrically connect the external terminal of the semiconductor IC. 9. The circuit board as claimed in claim 8 , wherein the semiconductor IC is thinned. 10. The circuit board as claimed in claim 9 , wherein the thermal pressing causes a part of the resin substrate to flow into the via hole, thereby reducing an amount of the resin substrate in the core section. 11. The circuit board as claimed in claim 10 , wherein the thermal pressing first causes a pressure increase on the resin substrate to cause the part of the resin substrate to flow into the via hole and then applies a higher heat temperature to cure the resin substrate. 12. The circuit board as claimed in claim 8 , wherein the resin substrate has a second surface that is opposite to the first surface, the second surface of the resin substrate is free from any wiring layer. 13. The circuit board as claimed in claim 12 , wherein a thickness of the housing section is less than a thickness of the core section, thereby at least one of the first and second surfaces of the resin substrate has a dented shape in the housing section. 14. The circuit board as claimed by claim 8 , further comprising an adhesive agent provided between the semiconductor IC and the wiring layer. 15. The circuit board as claimed in claim 14 , wherein the adhesive agent forms a part of the first surface of the resin substrate in the housing section. 16. The circuit board as claimed in claim 15 , further comprising a resist film covering the wiring layer, the resist film being in contact with the adhesive agent. 17. A circuit board comprising: a resin substrate including a core section including a core material that is impregnated with a resin and a housing section filled by the resin, the housing section being separate from the core section and surrounded by the core section so as to penetrate through the core section, the resin substrate having first and second surfaces opposite to each other; a semiconductor IC embedded in the housing section, the semiconductor integrated circuit (IC) having a third surface that faces to the first surface of the resin substrate and a fourth surface that faces to the second surface of the resin substrate, the semiconductor IC including an external terminal on the third surface; and a wiring layer formed on the first surface of the resin substrate over the core section and the housing section, the wiring layer being electrically connected to the external terminal of the semiconductor IC, wherein the second surface of the resin substrate is free from any wiring layer. 18. The circuit board as claimed in claim 17 , wherein the semiconductor IC is thinned. 19. The circuit board as claimed in claim 17 , wherein a thickness of the housing section is less than a thickness of the core section, thereby at least one of the first and second surfaces of the resin substrate has a dented shape in the housing section. 20. The circuit board as claimed in claim 19 , wherein the thermal pressing causes a part of the resin substrate to flow into the via hole, thereby reducing an amount of the resin substrate in the core section.
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the encapsulations exposing the passive side of the semiconductor body · CPC title
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