Printed circuit board and electronic device

Patent metadata

Field	Value
Publication number	US-9635752-B2
Application number	US-201414653723-A
Country	US
Kind code	B2
Filing date	Oct 24, 2014
Priority date	Jun 26, 2014
Publication date	Apr 25, 2017
Grant date	Apr 25, 2017

Abstract

The present disclosure relates to the field of circuits, and provides a printed circuit board (PCB) and an electronic device. The PCB includes a substrate and a wiring layer arranged at the substrate. The wiring layer includes a digital region and an analog region, and a gap region is defined between the digital region and the analog region. The substrate is provided with a hole in the gap region, and the digital region and the analog region of the wiring layer are connected through a magnetic bead.

First claim

What is claimed is:

1. A printed circuit board (PCB), comprising a substrate and a wiring layer arranged at the substrate;
wherein the wiring layer comprises a digital region and an analog region, and a gap region is defined between the digital region and the analog region; the substrate is provided with a plurality of holes in the gap region, and the digital region and the analog region of the wiring layer are connected through a plurality of magnetic beads;
wherein the plurality of holes and the plurality of magnetic beads are alternately arranged along an extending direction of the gap region.

2. The PCB according to claim 1 , further comprising a capacitor which connects the digital region with the analog region of the wiring layer; wherein the capacitor is arranged between adjacent holes.

3. The PCB according to claim 2 , wherein at least one of the plurality of magnetic beads and the capacitor is arranged between adjacent holes.

4. The PCB according to claim 1 , further comprising a ground layer and a power layer which are stacked with the wiring layer; wherein the wiring layer comprises a top wiring layer and a bottom wiring layer, and the ground layer and the power layer are arranged between the top wiring layer and the bottom wiring layer.

5. The PCB according to claim 4 , wherein the ground layer comprises a first region corresponding to the digital region and a second region corresponding to the analog region; the power layer comprises a third region corresponding to the digital region and a fourth region corresponding to the analog region; the first region has an area larger than that of the third region, and the second region has an area larger than that of the fourth region.

6. The PCB according to claim 4 , wherein the ground layer is provided with via holes penetrating through the wiring layer, the ground layer and the power layer at positions of the first region and the second region close to the gap region, respectively.

7. The PCB according to claim 4 , wherein a distance between the power layer and the gap region is greater than or equal to 0.5 mm, and a distance between the power layer and a periphery of the PCB is greater than or equal to 0.5 mm.

8. The PCB according to claim 1 , wherein each of the plurality of holes has a width greater than 1 mm and a length greater than 3 mm.

9. The PCB according to claim 1 , wherein a distance within the gap region between the digital region and the analog region of the wiring layer is greater than or equal to 0.5 mm.

10. The electronic device according to claim 1 , wherein each of the plurality of holes has a width greater than 1 mm and a length greater than 3 mm.

11. The electronic device according to claim 1 , wherein a distance within the gap region between the digital region and the analog region of the wiring layer is greater than or equal to 0.5 mm.

12. An electronic device, comprising a printed circuit board (PCB);
wherein the PCB comprises a substrate and a wiring layer arranged at the substrate;
wherein the wiring layer comprises a digital region and an analog region, and a gap region is defined between the digital region and the analog region; the substrate is provided with a plurality of holes in the gap region, and the digital region and the analog region of the wiring layer are connected through a plurality of magnetic beads;
wherein the plurality of holes and the plurality of magnetic beads are alternately arranged along an extending direction of the gap region.

13. The electronic device according to claim 12 , wherein the PCB further comprises a capacitor which connects the digital region with the analog region of the wiring layer; wherein the capacitor is arranged between adjacent holes.

14. The electronic device according to claim 13 , wherein at least one of the plurality of magnetic beads and the capacitor is arranged between adjacent holes.

15. The electronic device according to claim 12 , wherein the PCB further comprises a ground layer and a power layer which are stacked with the wiring layer; wherein the wiring layer comprises a top wiring layer and a bottom wiring layer, and the ground layer and the power layer are arranged between the top wiring layer and the bottom wiring layer.

16. The electronic device according to claim 15 , wherein the ground layer comprises a first region corresponding to the digital region and a second region corresponding to the analog region; the power layer comprises a third region corresponding to the digital region and a fourth region corresponding to the analog region; the first region has an area larger than that of the third region, and the second region has an area larger than that of the fourth region.

17. The electronic device according to claim 15 , wherein the ground layer is provided with via holes penetrating through the wiring layer, the ground layer and the power layer at positions of the first region and the second region close to the gap region, respectively.

18. The electronic device according to claim 15 , wherein a distance between the power layer and the gap region is greater than or equal to 0.5 mm, and a distance between the power layer and a periphery of the PCB is greater than or equal to 0.5 mm.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Wu Yue
• Ren Yan
• Wang Zifeng

Classifications

• H05K1/0233 Primary

  Filters, inductors or a magnetic substance · CPC title

• H05K1/0228

  Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors (balanced signal pairs H05K1/0245) · CPC title

• H05K1/162

  incorporating printed capacitors · CPC title

• H05K1/0231

  Capacitors or dielectric substances · CPC title

• H05K1/0225 Primary

  Single or multiple openings in a shielding, ground or power plane (H05K1/0227 takes precedence) · CPC title