Transmitter with a reduced complexity digital up-converter

Patent metadata

Field	Value
Publication number	US-9634694-B2
Application number	US-201414163783-A
Country	US
Kind code	B2
Filing date	Jan 24, 2014
Priority date	Nov 26, 2013
Publication date	Apr 25, 2017
Grant date	Apr 25, 2017

Abstract

The present disclosure is directed to a system and method for performing digital up-conversion of a signal to a desired RF carrier frequency. The system and method efficiently perform digital up-conversion of the signal, in one example, by controlling a sample clock that is used by a DAC to sample and convert the up-converted signal from the digital domain to the analog domain to have a frequency that is four or eight times the desired RF carrier frequency. By controlling the sample clock of the DAC to have a frequency that is four or eight times the desired RF carrier frequency, the system and method can be implemented using currently available IC process geometries such that the implementation consumes much less area and/or power than an analog up-converter configured to have equivalent up-conversion functionality.

First claim

What is claimed is:

1. A transmitter comprising:
a sample clock generator configured to generate a sample clock to have a frequency that is 4, 8, or 8/3 times a carrier frequency plus an offset frequency;
an intermediate frequency (IF) digital frequency-shifter configured to frequency-shift a baseband signal by the offset frequency divided by 4, 8, or 8/3 to provide an IF signal;
a radio frequency (RF) digital up-converter configured to up-convert the IF signal to provide a digital RF signal at the carrier frequency; and
a digital-to-analog converter (DAC) configured to sample the digital RF signal using the sample clock and convert the samples of the digital RF signal to an analog RF signal for transmission over a channel.

2. The transmitter of claim 1 , wherein the RF digital up-converter is configured to up-convert the IF signal to provide the digital RF signal at the carrier frequency by effectively multiplying an in-phase component of the IF signal by the sequence {1, 0, −1, 0} and a quadrature component of the IF signal by the sequence {0, 1, 0, −1}.

3. The transmitter of claim 1 , wherein the RF digital up-converter is configured to up-convert the IF signal to provide the digital RF signal at the carrier frequency by effectively multiplying an in-phase component of the IF signal by the sequence {1, √{square root over (2)}/2, 0, −√{square root over (2)}/2, −1, −√{square root over (2)}/2, 0, and √{square root over (2)}/2} and a quadrature component of the IF signal by the sequence {0, √{square root over (2)}/2, 1, √{square root over (2)}/2, 0, −√{square root over (2)}/2, −1, −√{square root over (2)}/2,}.

4. The transmitter of claim 1 , wherein the RF digital up-converter is configured to up-convert the IF signal to provide the digital RF signal at the carrier frequency by effectively multiplying an in-phase component of the IF signal by the sequence {1, −√{square root over (2)}/2, 0, √{square root over (2)}/2, −1, √{square root over (2)}/2, 0, −√{square root over (2)}/2} and a quadrature component of the IF signal by the sequence {0, √{square root over (2)}/2, −1, √{square root over (2)}/2, 0, −√{square root over (2)}/2, 1, −√{square root over (2)}/2}.

5. The transmitter of claim 1 , wherein the sample clock generator is configured to generate the sample clock to have a frequency that is either 4 or 8 times the carrier frequency based on anticipated image noise from an unwanted sideband of the baseband signal.

6. The transmitter of claim 1 , wherein the RF digital up-converter comprises a multiplexer configured to select between a sample of a first component of the IF signal, a negated version of the sample of the first component of the IF signal, a sample of a second component of the IF signal, or a negated version of the sample of the second component of the IF signal to provide a sample of the digital RF signal at the carrier frequency.

7. The transmitter of claim 1 , further comprising a sample rate converter configured to convert a sample rate of the IF signal to match the frequency of the sample clock.

8. A transmitter comprising:
a sample clock generator configured to generate a sample clock to have a frequency that is 4, 8, or 8/3 times a carrier frequency;
a radio frequency (RF) digital up-converter configured to up-convert an intermediate frequency (IF) signal to provide a digital RF signal at the carrier frequency, wherein the IF signal is generated by up-converting a baseband signal to pre-compensate for an offset in the sample clock; and
a digital-to-analog converter (DAC) configured to sample the digital RF signal using the sample clock and convert the samples of the digital RF signal to an analog RF signal for transmission over a channel.

9. The transmitter of claim 8 , wherein the RF digital up-converter is configured to up-convert the IF signal to provide the digital RF signal at the carrier frequency by effectively multiplying an in-phase component of the IF signal by the sequence {1, 0, −1, 0} and a quadrature component of the IF signal by the sequence {0, 1, 0, −1}.

10. The transmitter of claim 8 , wherein the RF digital up-converter is configured to up-convert the IF signal to provide the digital RF signal at the carrier frequency by effectively multiplying an in-phase component of the baseband or IF signal by the sequence {1, √{square root over (2)}/2, 0, −√{square root over (2)}/2, −1, −√{square root over (2)}/2, 0, and √{square root over (2)}/2} and a quadrature component of the IF signal by the sequence {0, √{square root over (2)}/2, 1, √{square root over (2)}/2, 0, −√{square root over (2)}/2, −1, √{square root over (2)}/2,}.

11. The transmitter of claim 8 , wherein the RF digital up-converter is configured to up-convert the IF signal to provide the digital RF signal at the carrier frequency by effectively multiplying an in-phase component of the IF signal by the sequence {1, −√{square root over (2)}/2, 0, √{square root over (2)}/2, −1, √{square root over (2)}/2, 0, −√{square root over (2)}/2} and a quadrature component of the IF signal by the sequence {0, √{square root over (2)}/2, −1, −√{square root over (2)}/2, 0, −√{square root over (2)}/2, 1, −√{square root over (2)}/2}.

12. The transmitter of claim 8 , wherein the sample clock generator is configured to generate the sample clock to have a frequency that is either 4 or 8 times the carrier frequency based on anticipated image noise from an unwanted sideband of the baseband signal.

13. The transmitter of claim 8 , wherein the RF digital up-converter comprises a multiplexer configured to select between a sample of a first component of the or IF signal, a negated version of the sample of the first component of the IF signal, a sample of a second component of the IF signal, or a negated version of the sample of the second component of the IF signal to provide a sample of the digital RF signal at the carrier frequency.

14. The transmitter of claim 8 , further comprising a sample rate converter configured to convert a sample rate of the IF signal to match the frequency of the sample clock.

15. A transmitter comprising:
a sample clock generator configured to generate a sample clock to have a frequency that is N times a carrier frequency, wherein the reciprocal value of N times 360 degrees is a sub-multiple of 90 degrees or is a multiple of a sub-multiple of 90 degrees that is less than 180 degrees and not a sub-multiple of 360 degrees, and wherein N is not equal to 4 or 8;
a radio frequency (RF) digital up-converter configured to up-convert an intermediate frequency (IF) signal to provide a digital RF signal at the carrier frequency, wherein the IF signal is generated by up-converting a baseband signal to pre-compensate for an offset in the sample clock; and
a digital-to-analog converter (DAC) configured to sample the digital RF signal using the sample clock and convert the samples of the digital RF signal to an analog RF signal for transmission over a channel.

16. The transmitter of claim 15 , wherein the RF digital up-converter is configured to up-convert the IF signal to provide the digital RF signal at the carrier frequency by effectively multiplying an in-phase component of the IF signal by the sequence {1, 0, −1, 0} and a quadrature component of the IF signal by the sequence {0, 1, 0, −1}.

17. The transmitter of claim 15 , wherein the RF digital up-converter is configured to up-convert the IF signal to provide the digital RF signal at the carrier frequency by effectively multiplying an in-phase component of the IF signal by the sequence {1, √{square root over (2)}/2, 0, −√{square root over (2)}/2, −1,

Assignees

• Avago Technologies General Ip

Inventors

• Harris David Money
• Garrett David
• Lorenz Bob

Classifications

• H04B1/0007 Primary

  wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage · CPC title