Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) and related components and methods

Patent metadata

Field	Value
Publication number	US-9634640-B2
Application number	US-201313887568-A
Country	US
Kind code	B2
Filing date	May 6, 2013
Priority date	May 6, 2013
Publication date	Apr 25, 2017
Grant date	Apr 25, 2017

Abstract

Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) are disclosed. In one embodiment, the tunable diplexer may be formed by providing one of either a varactor or a variable inductor in the diplexer. The variable nature of the varactor or the variable inductor allows a notch in the diplexer to be tuned so as to select a band stop to eliminate harmonics at a desired frequency as well as control the cutoff frequency of the pass band. By stacking the elements of the diplexer into three dimensions, space is conserved and a variety of varactors and inductors are able to be used.

First claim

What is claimed is:

1. A three-dimensional (3D) integrated circuit (IC) (3DIC), comprising:
a first tier comprising at least one inductor, wherein the at least one inductor comprises a through substrate via inductor, wherein the through substrate via inductor comprises a high Q inductor, wherein Q is greater than or equal to thirty at 1 GHz; and
a second tier comprising at least one varactor coupled to the at least one inductor, the at least one inductor and the at least one varactor collectively forming a tunable diplexer.

2. The 3DIC of claim 1 wherein the at least one varactor comprises a silicon on glass (SOG) varactor.

3. The 3DIC of claim 1 wherein the through substrate via inductor comprises a through glass via (TGV) inductor.

4. The 3DIC of claim 1 wherein the at least one inductor and the at least one varactor form a low pass (LP) filter within the tunable diplexer.

5. The 3DIC of claim 1 further comprising a second varactor positioned in the second tier coupled to a plurality of second inductors in the first tier, the second varactor and the plurality of second inductors collectively forming a low pass (LP) filter of the tunable diplexer.

6. The 3DIC of claim 1 wherein the at least one varactor is configured to adjust a notch frequency of a filter within the tunable diplexer.

7. The 3DIC of claim 1 wherein the through substrate via inductor is configured to control a cutoff frequency for a filter within the tunable diplexer.

8. The 3DIC of claim 1 integrated into a semiconductor die.

9. The 3DIC of claim 1 integrated into a device selected from the group consisting of a set top box, an entertainment unit, a navigation device, a communications device, a fixed location data unit, a mobile location data unit, a mobile phone, a cellular phone, a computer, a portable computer, a desktop computer, a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, and a portable digital video player.

10. A method of forming a tunable diplexer, comprising:
forming a through substrate inductor in a first tier of a three-dimensional (3D) integrated circuit (IC) (3DIC) wherein the through substrate inductor comprises a high Q inductor, wherein Q is greater than or equal to thirty at 1 GHz;
forming a varactor in a second tier of the 3DIC; and
electrically coupling the varactor to the through substrate inductor in the 3DIC such that the through substrate inductor and the varactor form a filter for a tunable diplexer.

11. The method of claim 10 wherein electrically coupling the varactor to the through substrate inductor comprises effectuating a substrate transfer and using metal-to-metal bonding.

12. The method of claim 10 wherein electrically coupling the varactor to the through substrate inductor comprises die stacking the second tier on the first tier and using a flip-chip bump.

13. The method of claim 10 wherein forming the through substrate inductor comprises forming a through glass via (TGV) inductor.

14. The method of claim 10 wherein forming the varactor in the second tier comprises forming a silicon on glass (SOG) varactor.

15. A three-dimensional (3D) integrated circuit (IC) (3DIC), comprising:
a first tier comprising at least one through substrate via inductor wherein the at least one through substrate via inductor comprises a high Q inductor, wherein Q is greater than or equal to thirty at 1 GHz; and
a second tier comprising at least one means for providing variable capacitance coupled to the at least one through substrate via inductor, the at least one through substrate via inductor and the at least one means for providing variable capacitance collectively forming a tunable diplexer.

16. A tunable diplexer integrated circuit (IC), comprising:
a first frequency port configured to transceive first signals having a first frequency band;
a second frequency port configured to transceive second frequency signals having a second frequency band outside of the first frequency band;
an antenna port;
a first pass filter configured to pass signals within the first frequency band between the first frequency port and the antenna port;
a second pass filter configured to pass signals within the second frequency band between the second frequency port and the antenna port; and
at least one notch filter comprising at least one of: a varactor and a variable through substrate via inductor, the at least one notch filter configured to provide a tunable notch band between at least two of the first frequency port, the second frequency port, and the antenna port, wherein the variable through substrate via inductor comprises a high Q inductor, wherein Q is greater than or equal to thirty at 1 GHz.

17. The tunable diplexer IC of claim 16 wherein the varactor comprises a high Q varactor, wherein Q is greater than or equal to one hundred at 2 GHz.

18. The tunable diplexer IC of claim 16 wherein the at least one notch filter is configured to block harmonics of the first signals.

19. The tunable diplexer IC of claim 16 wherein the variable through substrate via inductor comprises a through glass via (TGV) inductor.

Assignees

• Qualcomm Inc

Inventors

• Zuo Chengjie
• Kim Daeik D
• Lan Je-Hsiung
• Kim Jonghae
• Velez Mario Francisco
• Yun Changhan
• Berdy David F
• Mikulka Robert P
• Nowak Matthew M
• Zhang Xiangdong
• See Puay H

Classifications

• Y10T29/49016

  Antenna or wave energy "plumbing" making · CPC title

• H03H7/463 Primary

  Duplexers · CPC title

• H03H3/00

  Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators · CPC title

• H03H7/461 Primary

  particularly adapted for use in common antenna systems · CPC title

• H03H7/0115

  comprising only inductors and capacitors (H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence) · CPC title