Passivation technique for wide bandgap semiconductor devices

Patent metadata

Field	Value
Publication number	US-9634111-B2
Application number	US-201314396507-A
Country	US
Kind code	B2
Filing date	Apr 23, 2013
Priority date	Apr 23, 2012
Publication date	Apr 25, 2017
Grant date	Apr 25, 2017

Abstract

A method of protecting a semiconductor structure from water and a semiconductor structure formed by the method. The semiconductor structure includes a wide-bandgap semiconductor material in which at least one semiconductor device is formed. The method includes heating the semiconductor structure in a vacuum to a temperature of at least 200° C. to remove water from the semiconductor structure. The method also includes, after the heating of the semiconductor structure, forming a layer comprising a hydrophobic material over the semiconductor structure. The semiconductor structure is kept in the vacuum between the heating of the semiconductor structure and the forming of the layer comprising the hydrophobic material.

First claim

The invention claimed is:

1. A method of protecting a semiconductor structure from water, the semiconductor structure comprising a wide-bandgap semiconductor material in which at least one semiconductor device is formed, the method comprising:
heating the semiconductor structure in a vacuum to a temperature of at least 200° C. to remove water from the semiconductor structure; and
after the heating of the semiconductor structure, forming a layer comprising a hydrophobic material over the semiconductor structure, wherein the semiconductor structure is kept in the vacuum between the heating of the semiconductor structure and the forming of the layer comprising the hydrophobic material.

2. The method of claim 1 , wherein the wide-bandgap semiconductor material comprises a III-V nitride semiconductor material.

3. The method of claim 2 , wherein the III-V nitride semiconductor material comprises an Al x In y Ga z N material in which one or more of x, y and z is greater than zero.

4. The method of claim 1 , wherein the vacuum has a pressure of 1×10 −3 torr or lower.

5. The method of claim 1 , wherein the heating of the semiconductor structure is performed in a first vacuum chamber and the forming of the layer comprising a hydrophobic material is performed in the first vacuum chamber or a second vacuum chamber.

6. The method of claim 1 , wherein the hydrophobic material has a water contact angle larger than 90°.

7. The method of claim 1 , wherein the hydrophobic material has a surface free energy less than 100 milli-joule per meter squared (mJ/m 2 ).

8. The method of claim 1 , wherein the hydrophobic material has a dielectric constant less than 12.

9. The method of claim 1 , wherein the hydrophobic material includes at least one material selected from the group consisting of polytetrafluoroethylene (PTFE), polymethylmethacrylate (PMMA), benzocyclobutene (BCB), polyethylene, parylene and a self-assembled monolayer (SAM).

10. The method of claim 1 , further comprising forming a dielectric layer, wherein the layer comprising the hydrophobic material is formed over the dielectric layer.

11. The method of claim 10 , wherein the semiconductor device comprises a transistor and the dielectric layer is formed underneath a gate of the transistor.

12. The method of claim 10 , further comprising forming a second dielectric layer and/or a passivation layer over the layer comprising the hydrophobic material.

13. The method of claim 1 , further comprising forming a dielectric layer and/or a passivation layer over the layer comprising the hydrophobic material.

14. The method of claim 1 , further comprising increasing a surface roughness of the layer comprising the hydrophobic material.

15. The method of claim 14 , wherein the surface roughness of the layer is increased such that the layer has a water contact angle larger than 150°.

16. The method of claim 1 , further comprising increasing a surface roughness of the semiconductor structure prior to forming the layer comprising the hydrophobic material.

17. The method of claim 1 , further comprising packaging the semiconductor structure in an environment having less than 30% relative humidity.

18. The method of claim 17 , wherein packaging the semiconductor structure comprises packaging the semiconductor structure in a vacuum.

19. A semiconductor structure comprising a wide-bandgap semiconductor material in which at least one semiconductor device is formed, the semiconductor structure being formed by a method comprising:
heating the semiconductor structure in a vacuum to a temperature of at least 200° C. to remove water from the semiconductor structure; and
after the heating of the semiconductor structure, forming a layer comprising a hydrophobic material over the semiconductor structure, wherein the semiconductor structure is kept in the vacuum between the heating of the semiconductor structure and the forming of the layer comprising the hydrophobic material.

20. The semiconductor structure of claim 19 , wherein the hydrophobic material includes at least one material selected from the group consisting of polytetrafluoroethylene (PTFE), polymethylmethacrylate (PMMA), benzocyclobutene (BCB), polyethylene, parylene and a self-assembled monolayer (SAM).

Assignees

• Massachusetts Inst Technology

Inventors

• Gao Feng
• Chen Di
• Lu Bin
• Palacios Tomas Apostol

Classifications

• H10W74/147

  the encapsulations being multilayered · CPC title

• H10W74/137

  the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H01L2924/0002

  Electricity · mapped topic

• H01L23/3171

  Electricity · mapped topic