Light-emitting device

US9633871B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9633871-B2
Application numberUS-201213588605-A
CountryUS
Kind codeB2
Filing dateAug 17, 2012
Priority dateAug 24, 2011
Publication dateApr 25, 2017
Grant dateApr 25, 2017

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To provide a highly reliable light-emitting device with less occurrence of cracks in a sealant bonding two facing substrates together. In a light-emitting device, a first substrate including a light-emitting unit, and a second substrate are bonded to each other with glass frit. A wiring in the area overlapping with a sealing material formed by melting and solidifying glass frit may be formed of a conductive material having a linear thermal expansion coefficient close to that of a substrate material. More specifically, the difference in the linear thermal expansion coefficient between the conductive material and the substrate material is 5 ppm/K or less at a temperature of 0° C. to 500° C.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic apparatus comprising: a first substrate; a wiring on the first substrate, the wiring being formed from an electrically conductive material and comprising tungsten; a low-resistance wiring on the first substrate; a second substrate; and a glass frit material interposed between the first substrate and the second substrate, and between the wiring and the second substrate, so that a first portion of the wiring is located inside of a sealed region defined by the first substrate, the second substrate, and the glass frit material, and a second portion of the wiring is located outside of the sealed region, wherein a difference in linear thermal expansion coefficient between the electrically conductive material of the wiring and a material of the first substrate is 5 ppm/K or less over a temperature range of 0° C. to 500° C., wherein the low-resistance wiring comprises a first low-resistance wiring portion formed inside of the sealed region and a second low-resistance wiring portion formed outside of the sealed region, wherein the first portion of the wiring is electrically connected to the first low-resistance wiring portion at a first connecting portion formed inside of the sealed region, wherein the second portion of the wiring is electrically connected to the second low-resistance wiring portion at a second connecting portion formed outside of the sealed region, and wherein, for a given length, the first low-resistance wiring portion and the second low-resistance wiring portion both have an electrical resistance lower than the wiring. 2. The electronic apparatus according to claim 1 , wherein the difference in linear thermal expansion coefficient between the electrically conductive material of the wiring and the material of the first substrate is 2 ppm/K or less over the temperature range of 0° C. to 500° C. 3. The electronic apparatus according to claim 1 , wherein the wiring is made of tungsten. 4. The electronic apparatus according to claim 1 , further comprising: a semiconductor oxide layer interposed between the wiring and the glass frit material. 5. The electronic apparatus according to claim 1 , further comprising: a low-resistance wiring formed either inside or outside of the sealed region, and electrically connected to the wiring, wherein, for a given length, the low-resistance wiring has an electrical resistance lower than the wiring. 6. A light-emitting device comprising: a first substrate; a wiring on the first substrate, the wiring being formed from an electrically conductive material and comprising tungsten; a low-resistance wiring on the first substrate; a second substrate; a glass frit material interposed between the first substrate and the second substrate, and between the wiring and the second substrate, so that a first portion of the wiring is located inside of a sealed region defined by the first substrate, the second substrate, and the glass frit material, and a second portion of the wiring is located outside of the sealed region; and a light-emitting element in the sealed region, the light-emitting element comprising a light-emitting layer interposed between a first electrode and a second electrode, wherein a difference in linear thermal expansion coefficient between the electrically conductive material of the wiring and a material of the first substrate is 5 ppm/K or less over a temperature range of 0° C. to 500° C., wherein the low-resistance wiring comprises a first low-resistance wiring portion formed inside of the sealed region and connected to a pixel and a drive circuitry, and a second low-resistance wiring portion formed outside of the sealed region and connected to a flexible printed circuit, wherein the first portion of the wiring is electrically connected to the first low-resistance wiring portion at a first connecting portion formed inside of the sealed region, wherein the second portion of the wiring is electrically connected to the second low-resistance wiring portion at a second connecting portion formed outside of the sealed region, and wherein, for a given length, the first low-resistance wiring portion and the second low-resistance wiring portion both have an electrical resistance lower than the wiring of the light-emitting device. 7. The light-emitting device according to claim 6 , wherein the difference in linear thermal expansion coefficient between the electrically conductive material of the wiring and the material of the first substrate is 2 ppm/K or less over the temperature range of 0° C. to 500° C. 8. The light-emitting device according to claim 6 , wherein the wiring is made of tungsten. 9. The light-emitting device according to claim 6 , further comprising: a semiconductor oxide layer interposed between the wiring and the glass frit material. 10. The light-emitting device according to claim 6 , further comprising: a buffer layer formed from the electrically conductive material between the glass frit material and the first substrate, the buffer layer being provided in an area overlapping with the glass fit material and in which the wiring is not provided. 11. The light-emitting device according to claim 6 , further comprising: a transistor comprising a source electrode and a drain electrode, one of the source electrode and the drain electrode being electrically connected to the light-emitting element. 12. The light-emitting device according to claim 6 , further comprising: a transistor comprising a source electrode and a drain electrode, one of the source electrode and the drain electrode being electrically connected to the light-emitting element, wherein the low-resistance wiring and the source electrode each comprise a layer formed from a same conductive film. 13. The light-emitting device according to claim 6 , further comprising: a transistor comprising a gate electrode, a source electrode and a drain electrode, one of the source electrode and the drain electrode being electrically connected to the light-emitting element, wherein the wiring and the gate electrode each comprise a layer formed from a same conductive film. 14. The light-emitting device according to claim 6 , further comprising: a transistor comprising a source electrode and a drain electrode, one of the source electrode and the drain electrode being electrically connected to the light-emitting element; and an inorganic insulating film covering the transistor and interposed between the wiring and the glass frit material. 15. The light-emitting device according to claim 6 , further comprising: a transistor comprising a gate electrode, a source electrode and a drain electrode, one of the source electrode and the drain electrode being electrically connected to the light-emitting element, wherein the wiring and the gate electrode each comprise a first layer formed from a same conductive film, and wherein the low-resistance wiring and the source electrode each comprise a second layer formed from a same conductive film. 16. An electronic device comprising the light-emitting device according to claim 6 . 17. The electronic apparatus according to claim 1 , wherein the wiring comprises a conductive material selected among molybdenum, titanium, iridium, chromium, tantalum, platinum, vanadium, and rhodium. 18. The electronic apparatus according to claim 1 , further comprising: an oxide layer interposed between the wiring and the glass frit material. 19. The electronic apparatus according to claim 1 , further comprising: an oxide

Assignees

Inventors

Classifications

  • Seals · CPC title

  • H10W95/00Primary

    Packaging processes not covered by the other groups of this subclass · CPC title

  • Peripheral sealing arrangements, e.g. adhesives, sealants · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US9633871B2 cover?
To provide a highly reliable light-emitting device with less occurrence of cracks in a sealant bonding two facing substrates together. In a light-emitting device, a first substrate including a light-emitting unit, and a second substrate are bonded to each other with glass frit. A wiring in the area overlapping with a sealing material formed by melting and solidifying glass frit may be formed of…
Who is the assignee on this patent?
Hatano Kaoru, Nishido Yusuke, Yamazaki Shunpei, and 1 more
What technology area does this patent fall under?
Primary CPC classification H10W95/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).