CPU/GPU synchronization mechanism

US9633407B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9633407-B2
Application numberUS-201113193779-A
CountryUS
Kind codeB2
Filing dateJul 29, 2011
Priority dateJul 29, 2011
Publication dateApr 25, 2017
Grant dateApr 25, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A thread on one processor may be used to enable another processor to lock or release a mutex. For example, a central processing unit thread may be used by a graphics processing unit to secure a mutex for a shared memory.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: using a first thread and a library on a central processing unit to spawn a second thread on said central processing unit specifically adapted to synchronize the first thread and a third thread on a graphics processing unit by receiving in the said second thread a request from said third thread, in response sending a system call to an operating system of said central processing unit, said second thread sending a response from the operating system to the third thread; and using said second thread to synchronize the third thread on a graphics processing unit and the second thread on the central processing unit. 2. The method of claim 1 including using the first thread running on the central processing unit to lock and unlock mutex for a thread on the graphics processing unit. 3. The method of claim 1 including using the first thread to request a lock or unlock mutex for a thread on a graphics processing unit. 4. The method of claim 3 including enabling said central processing unit to notify said graphics processing unit when a mutex is available. 5. The method of claim 1 including using shared virtual memory with said processing units. 6. A non-transitory computer readable medium storing instructions to enable a computer to: use a first thread and a library on a central processing unit to spawn a second thread on said central processing unit specifically adapted to synchronize the first thread and a third thread on a graphics processing unit by receiving in the said second thread a request from said third thread, in response sending a system call to an operating system of said central processing unit, said second thread sending a response from the operating system to the third thread; and use said second thread to synchronize the third thread on a graphics processing unit and the second thread on a central processing unit. 7. The medium of claim 6 further storing instructions to use the first thread running on a central processing unit to lock mutex for a thread on the graphics processing unit. 8. The medium of claim 7 further storing instructions to use the first thread running on the central processing unit to unlock mutex for a thread on the graphics processing unit. 9. The medium of claim 7 further storing instructions to use the first thread to request a lock or unlock mutex for a thread on a graphics processing unit. 10. The medium of claim 9 further storing instructions to enable said central processing unit to notify said graphics processing unit when a mutex is available. 11. The medium of claim 6 further storing instructions to use shared virtual memory with said processing units. 12. An apparatus comprising: a graphics processing unit; a central processing unit coupled to said graphics processing unit; and a memory shared by said graphics processing unit and said central processing unit, said central processing unit to provide a first thread and a library on a central processing unit to spawn a second thread on said central processing unit specifically adapted to synchronize the first thread and a third thread on a graphics processing unit by receiving in the said second thread a request from said third thread, in response sending a system call to an operating system of said central processing unit, said second thread sending a response from the operating system to the third thread and use said second thread to synchronize the third thread on the graphics processing unit and the second thread on the central processing unit. 13. The apparatus of claim 12 including a graphics processing unit driver on said central processing unit. 14. The apparatus of claim 12 , said first thread to lock or unlock mutex for a thread on the graphics processing unit. 15. The apparatus of claim 14 , said central processing unit to notify said graphics processing unit when a mutex is available. 16. The apparatus of claim 12 wherein said memory is a shared virtual memory. 17. An apparatus comprising: a central processing unit; a memory coupled to said central processing unit; and said central processing unit to use a first thread to launch a second thread to enable synchronization between a third thread on a graphics processing unit by receiving in the said second thread a request from said third thread, in response sending a system call to an operating system of said central processing unit, said second thread sending a response from the operating system to the third thread and the second thread on the central processing unit. 18. The apparatus of claim 17 wherein said central processing unit to use the first thread to lock and unlock mutex for a thread running on a graphics processing unit. 19. The apparatus of claim 18 , said central processing unit to notify said graphics processing unit when a mutex is available. 20. The apparatus of claim 17 including a graphics processor coupled to said central processing unit.

Assignees

Inventors

Classifications

  • Memory management · CPC title

  • G06F9/3877Primary

    using a secondary processor, e.g. coprocessor (peripheral processor G06F13/12) · CPC title

  • G06T1/20Primary

    Processor architectures; Processor configuration, e.g. pipelining · CPC title

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9633407B2 cover?
A thread on one processor may be used to enable another processor to lock or release a mutex. For example, a central processing unit thread may be used by a graphics processing unit to secure a mutex for a shared memory.
Who is the assignee on this patent?
Ginzburg Boris, Natanzon Esfirush, Osadchiy Ilya, and 2 more
What technology area does this patent fall under?
Primary CPC classification G06F9/3877. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).