Current mirror bias circuit with voltage adjustment

US9632522B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9632522-B2
Application numberUS-201615095630-A
CountryUS
Kind codeB2
Filing dateApr 11, 2016
Priority dateApr 15, 2015
Publication dateApr 25, 2017
Grant dateApr 25, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Current mirror bias circuit with voltage adjustment. A biasing system can include an input configured to receive an input current and an output configured to provide an output current. The biasing system can include a first transistor having a first base coupled to the input and a first collector coupled to a supply voltage. The biasing system can further include a second transistor having a second base coupled to the output, a second collector coupled to the input, and a second emitter coupled to a ground voltage. The biasing system can include a voltage adjustment component having a voltage adjustment input coupled to a first emitter of the first transistor and a voltage adjustment output coupled to the output. The voltage adjustment component can be configured to reduce a voltage from the voltage adjustment input to the voltage adjustment output substantially independent of a magnitude of a current through the voltage adjustment component.

First claim

Opening claim text (preview).

What is claimed is: 1. A biasing system comprising: an input configured to receive an input current; an output configured to provide an output current; a first transistor having a first base coupled to the input and a first collector coupled to a supply voltage; a second transistor having a second base coupled to the output, a second collector coupled to the input, and a second emitter coupled to a ground voltage; and a voltage adjustment component having a voltage adjustment input coupled to a first emitter of the first transistor and a voltage adjustment output coupled to the output, the voltage adjustment component being configured to reduce a voltage from the voltage adjustment input to the voltage adjustment output substantially independent of a magnitude of a current through the voltage adjustment component. 2. The biasing system of claim 1 wherein the second base is coupled, via a capacitor, to the input. 3. The biasing system of claim 1 further comprising a third transistor having a third base coupled to the output, a third emitter coupled to the ground voltage, and a third collector coupled, via an inductor, to the supply voltage. 4. The biasing system of claim 3 wherein the third base is coupled to a radio-frequency (RF) input configured to receive an input RF signal and the third collector is coupled to an RF output configured to provide an output RF signal, the output RF signal being an amplified version of the input RF signal. 5. The biasing system of claim 3 wherein the output current biases the third transistor. 6. The biasing system of claim 3 wherein the first transistor is an emitter follower device, the second transistor is a mirror device, and the third transistor is an RF device. 7. The biasing system of claim 1 wherein the voltage adjustment component includes a diode. 8. The biasing system of claim 1 wherein the voltage adjustment component includes a voltage adjustment transistor having a voltage adjustment transistor base coupled to a voltage adjustment transistor collector. 9. The biasing system of claim 1 wherein the voltage adjustment component includes a plurality of voltage adjustment transistors in a Darlington configuration. 10. The biasing system of claim 1 wherein the voltage adjustment component includes a plurality of voltage adjustment elements connected in series. 11. The biasing system of claim 1 wherein the voltage adjustment component reduces a first collector-emitter voltage between the first collector and the first emitter. 12. The biasing system of claim 1 wherein the voltage adjustment component increases a second collector-emitter voltage between the second collector and the second emitter. 13. The biasing system of claim 3 wherein the voltage adjustment component equalizes the voltage such that a second collector-emitter voltage between the second collector and the second emitter is approximately equal to a third collector-emitter voltage between the third collector and a third emitter. 14. A radio-frequency (RF) module comprising: a packaging substrate configured to receive a plurality of components; and a biasing system implemented on the packaging substrate, the biasing system having an input configured to receive an input current and an output configured to provide an output current, the biasing system including a first transistor having a first base coupled to the input and a first collector coupled to a supply voltage, a second transistor having a second base coupled to the output, a second collector coupled to the input, and a second emitter coupled to a ground voltage, and a voltage adjustment component having a voltage adjustment input coupled to a first emitter of the first transistor and a voltage adjustment output coupled to the output, the voltage adjustment component being configured to reduce a voltage from the voltage adjustment input to the voltage adjustment output substantially independent of a magnitude of a current through the voltage adjustment component. 15. The RF module of claim 14 , wherein the RF module is a front-end module (FEM). 16. The RF module of claim 15 wherein the RF module includes an RF system including a third transistor having a third base coupled to the output, a third emitter coupled to the ground voltage, and a third collector coupled, via an inductor, to the supply voltage. 17. The RF module of claim 16 wherein the third base is coupled to a radio-frequency (RF) input configured to receive an input RF signal and the third collector is coupled to an RF output configured to provide an output RF signal, the output RF signal being an amplified version of the input RF signal. 18. A wireless device comprising: a transceiver configured to generate a radio-frequency (RF) signal; a front-end module (FEM) in communication with the transceiver, the FEM including a packaging substrate configured to receive a plurality of components, the FEM further including a biasing system implemented on the packaging substrate, the biasing system having an input configured to receive an input current and an output configured to provide an output current, the biasing system including a first transistor having a first base coupled to the input and a first collector coupled to a supply voltage, a second transistor having a second base coupled to the output, a second collector coupled to the input, and a second emitter coupled to a ground voltage, and a voltage adjustment component having a voltage adjustment input coupled to a first emitter of the first transistor and a voltage adjustment output coupled to the output, the voltage adjustment component being configured to reduce a voltage from the voltage adjustment input to the voltage adjustment output substantially independent of a magnitude of a current through the voltage adjustment component; and an antenna in communication with the FEM, the antenna configured to transmit the RF signal. 19. The wireless device of claim 18 wherein the FEM further includes an RF system implemented on the packaging substrate, the RF system including a third transistor having a third base coupled to the output, a third emitter coupled to the ground voltage, and a third collector coupled, via an inductor, to the supply voltage. 20. The wireless device of claim 19 wherein the third base is coupled to a radio-frequency (RF) input configured to receive the RF signal and the third collector is coupled to an RF output configured to provide the RF signal to the antenna.

Assignees

Inventors

Classifications

  • H03F1/0211Primary

    with control of the supply voltage or current · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

  • with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

  • with semiconductor devices only · CPC title

  • the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier · CPC title

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What does patent US9632522B2 cover?
Current mirror bias circuit with voltage adjustment. A biasing system can include an input configured to receive an input current and an output configured to provide an output current. The biasing system can include a first transistor having a first base coupled to the input and a first collector coupled to a supply voltage. The biasing system can further include a second transistor having a se…
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/0211. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).