Decision feedback equalizer

Patent metadata

Field	Value
Publication number	US-9628302-B2
Application number	US-201514719032-A
Country	US
Kind code	B2
Filing date	May 21, 2015
Priority date	May 21, 2015
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A decision-feedback equalizer for use in a receiving unit for receiving an incoming data stream and for providing a stream of bit data outputs, including at least one decision-feedback equalizer block comprising a plurality of speculation units. Each speculation unit includes a dynamic preamplifier for asynchronously amplifying a voltage difference depending on an input voltage of the incoming data stream and a given threshold voltage; and an arrangement for selectively generating a transconductor current which depends on the amplified voltage difference. Also included is one dynamic regenerator for associating an output data bit to the selectively generated transconductor current.

First claim

What is claimed is:

1. Digital decision feedback equalizer for use in a receiving unit for receiving an incoming data stream and for providing a stream of bit data outputs, including at least one decision-feedback equalizer block comprising:
one dynamic regenerator for associating an output data bit to a selectively generated transconductor current; and
a plurality of speculation units, each comprising:
a dynamic preamplifier for asynchronously amplifying a voltage difference depending on an input voltage of the incoming data stream and a given threshold voltage; and, corresponding to each dynamic preamplifier,
a means for selectively generating the transconductor current which depends on the amplified voltage difference of the corresponding dynamic preamplifier,

wherein a speculation logic is provided which is configured to select exactly one of the speculation units depending on at least one previous bit data output, so that the exactly one selected of the speculation units provides the respective transconductor current while the other speculation units provide no transconductor current.

2. Decision-feedback equalizer according to claim 1 , wherein to each of the speculation units a unique threshold voltage is associated.

3. Decision-feedback equalizer according to claim 1 , wherein the speculation units are interconnected with their outputs to form a current summing node, wherein the input of the one dynamic regenerator is coupled to the summing node.

4. Decision-feedback equalizer according to claim 1 , wherein the dynamic preamplifier of each speculation unit includes a differential amplifier.

5. Decision-feedback equalizer according to claim 4 , wherein the differential amplifier includes a cross-coupled cascade.

6. Decision-feedback equalizer according to claim 4 , wherein the differential amplifier is connected as a common-gate transconductor to directly provide the transconductor current, wherein a selection transistor is provided to select the transconductor current to be supplied to the dynamic regenerator.

7. Decision-feedback equalizer according to claim 1 , wherein the means for selectively generating a transconductor current includes a selectable transconductor to convert an output voltage of the differential amplifier to the transconductor current.

8. Decision-feedback equalizer according to claim 1 , wherein the dynamic regenerator includes a pair of cross-coupled inverters receiving the selected transconductor current to provide a spread output voltage corresponding to an output data bit depending on the sign of the transconductor current.

9. Decision-feedback equalizer according to claim 8 , wherein the output of the dynamic regenerator is coupled with a domino latch to hold the spread output voltage as the output data bit which is the binary decision result of the dynamic regenerator.

10. Decision-feedback equalizer according to claim 1 , wherein two decision-feedback equalizer blocks are configured to be operated in an interleaving manner.

11. Digital decision feedback equalizer for use in a receiving unit for receiving an incoming data stream and for providing a stream of bit data outputs, including at least one decision-feedback equalizer block comprising:
one dynamic regenerator for associating an output data bit to a selectively generated transconductor current; and
a plurality of speculation units, each consisting of:
a dynamic preamplifier for asynchronously amplifying a voltage difference depending on an input voltage of the incoming data stream and a provided threshold voltage; and
a selectable voltage to current converter for selectively generating the transconductor current so that it depends on the amplified voltage difference.

12. Decision-feedback equalizer according to claim 11 , wherein the dynamic preamplifier is configured to directly amplify the input voltage of the incoming data stream without latching.

13. Decision-feedback equalizer according to claim 11 , wherein the speculation units are interconnected with their outputs to form a current summing node, wherein the input of the dynamic regenerator is coupled to the summing node.

14. Receiving unit comprising a digital decision-feedback equalizer for use in a receiving unit of an incoming data stream and for providing a stream of bit data outputs, including at least one decision-feedback equalizer block comprising:
one dynamic regenerator for associating an output data bit to a selectively generated transconductor current; and
a plurality of speculation units, each comprising:
a dynamic preamplifier for asynchronously amplifying a voltage difference depending on an input voltage of the incoming data stream and a provided threshold voltage;
a means for selectively generating the transconductor current based on the amplified voltage difference.

Assignees

• IBM

Inventors

• Francese Pier Andrea

Classifications

• H04L25/03057 Primary

  with a recursive structure (H04L25/03031 takes precedence) · CPC title

• H04L25/0292 Primary

  Arrangements specific to the receiver end · CPC title

• H04L25/03878

  Line equalisers; line build-out devices · CPC title

• H04L25/03146

  with a recursive structure (H04L25/03127 takes precedence) · CPC title