High resolution sigma delta modulator for capacitance sensor terminal displacement measurement

Patent metadata

Field	Value
Publication number	US-9628104-B2
Application number	US-201514657323-A
Country	US
Kind code	B2
Filing date	Mar 13, 2015
Priority date	Mar 13, 2015
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A single plate capacitance sensor includes a sensor capacitor and a reference capacitor that share common plate. A capacitance-to-digital sigma delta modulator provides separate sensor excitation and reference excitation signals to the sensor capacitor and the reference capacitor to provide high resolution detection. Programmable ratio-metric excitation voltages and adaptive excitation voltage sources can be used to enhance modulator performance.

First claim

The invention claimed is:

1. A sensor circuit comprising:
a capacitance sensor that includes a sensor capacitor and a reference capacitor, a sensor plate terminal connected to the sensor capacitor, a reference plate terminal connected to the reference capacitor, and a common plate terminal connected to both the sensor capacitor and the reference capacitor, wherein spacing between the sensor plate terminal and the common plate terminal change in relation to a sensed parameter; and
a capacitance-to-digital sigma delta modulator that includes an integrator having an input connected to the common plate terminal and an output, a quantizer connected to the output of the integrator that produces a pulse code modulated output signal, and an excitation signal generator that provides a sensor excitation signal to the sensor plate terminal and a reference excitation signal to the reference plate terminal.

2. The sensor circuit of claim 1 , wherein the integrator comprises a first stage integrator connected to the input.

3. The sensor circuit of claim 2 , wherein the integrator comprises a second stage integrator connected between the first stage integrator and the output.

4. The sensor circuit of claim 1 , wherein the modulator further comprises an excitation voltage source generator that provides a plurality of excitation voltages to the excitation signal generator.

5. The sensor circuit of claim 4 , wherein excitation voltage source generator provides a first voltage, a second voltage, a third voltage, and a fourth voltage to the excitation signal generator.

6. The sensor circuit of claim 5 , wherein the excitation signal generator provides the sensor excitation signal based upon the first voltage, the second voltage, output states of the quantizer, and clock signals.

7. The sensor circuit of claim 6 , wherein the excitation signal generator provides the reference excitation signal based upon the second voltage, the third voltage, the fourth voltage, the output states of the quantizer, and the clock signals.

8. The sensor circuit of claim 7 , wherein the first voltage is greater than the third voltage, the third voltage is greater than the fourth voltage, and the fourth voltage is greater than the second voltage.

9. The sensor circuit of claim 5 , wherein the excitation voltage source generator comprises a voltage divider.

10. The sensor circuit of claim 5 , wherein the excitation voltage source generator provides programmable ratio-metric excitation voltages.

11. The sensor circuit of claim 4 , wherein the modulator further comprises an adaptive excitation voltage control connected to the excitation voltage source generator that varies the excitation voltages provided by the excitation voltage source generator.

12. The sensor circuit of claim 1 , wherein the sensor capacitor and the reference capacitor share a common plate, and wherein the common plate terminal is connected to the common plate.

13. The sensor circuit of claim 12 , wherein the capacitance sensor is an absolute pressure sensor.

14. The sensor circuit of claim 1 , wherein the modulator is a two-phase sigma delta modulator.

15. The sensor circuit of claim 1 , wherein the capacitance-to-digital sigma delta modulator produces an output representative of C REF /C SENSOR , where C REF is capacitance of the reference capacitor and C SENSOR is capacitance of the sensor capacitor.

16. The sensor circuit of claim 1 , wherein the capacitance-to-digital sigma delta modulator produces an output representative of C C /C SA , where C SA is an active sensing capacitance of the sensor capacitor, and where C C is a characteristic capacitance defined as

C
C

≡

C
1

·

C
0

C
1

+

C
0

,

where C 1 is C SA at a maximum normalized sensed parameter and C 0 is C SA at a minimum normalized sensed parameter.

17. The sensor circuit of claim 1 , wherein the capacitance sensor is a terminal displacement capacitance sensor.

Assignees

• Rosemount Inc

Inventors

• Wang Rongtai
• Schulte John Paul

Classifications

• G01L9/12

  by making use of variations in capacitance {, i.e. electric circuits therefor} · CPC title

• G01L9/0072

  using variations in capacitance · CPC title

• H03M3/376

  Prevention or reduction of switching transients, e.g. glitches · CPC title

• H03M3/494

  Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems · CPC title

• H03M3/356

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M3/494) · CPC title