Charge pump circuit, phase locked loop apparatus, integrated circuit, and method of manufacture of a charge pump

Patent metadata

Field	Value
Publication number	US-9628093-B2
Application number	US-201314899499-A
Country	US
Kind code	B2
Filing date	Jul 18, 2013
Priority date	Jul 18, 2013
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A charge pump circuit comprises a first bipolar transistor device and a second bipolar switching device arranged in a differential pair configuration. A first terminal of each of the first and second bipolar switching devices are coupled to a supply. A second like terminal of each of the first and second bipolar switching devices are coupled together and to ground potential via a pulsed current source. A field effect switching device is also provided and the first terminal of the first bipolar switching device is coupled to the voltage supply via the field effect switching device.

First claim

The invention claimed is:

1. A charge pump circuit comprising:
a first bipolar switching device and a second bipolar switching device arranged in a differential pair configuration;
a first terminal of each of the first and second bipolar switching devices coupled to a voltage supply;
a second like terminal of each of the first and second bipolar switching devices being coupled directly together at a circuit node, wherein the circuit node is coupled to ground potential via a pulsed current source; and
a field effect switching device, wherein the first terminal of the first bipolar switching device is coupled to the voltage supply via the field effect switching device.

2. A charge pump circuit as claimed in claim 1 , wherein the first terminal of the second bipolar switching device is coupled to the voltage supply via a low pass filter.

3. A charge pump circuit as claimed in claim 1 , wherein the first terminal of the first bipolar switching device is also coupled to the supply via another current source.

4. A charge pump circuit as claimed in claim 3 , wherein the field effect switching device is coupled to the voltage supply via the another current source.

5. A charge pump circuit as claimed in claim 1 , wherein the first and second bipolar switching devices each comprise a control terminal, together constituting differential control terminals.

6. An apparatus comprising the charge pump circuit as claimed in claim 1 , further comprising:
a driving stage circuit coupled to the charge pump circuit and arranged to translate, when in use, an emitter coupled logic signal to a ground-referenced signal.

7. An apparatus, comprising:
a charge pump circuit having:
a first bipolar switching device and a second bipolar switching device arranged in a differential pair configuration;
a first terminal of each of the first and second bipolar switching devices coupled to a voltage supply;
a second like terminal of each of the first and second bipolar switching devices being coupled together and to ground potential via a pulsed current source; and
a field effect switching device, wherein the first terminal of the first bipolar switching device is coupled to the voltage supply via the field effect switching device;
a driving stage circuit coupled to the charge pump circuit and arranged to translate, when in use, an emitter coupled logic signal to a ground-referenced signal, wherein the driving stage circuit comprises a buffer circuit.

8. An apparatus as claimed in claim 7 , wherein the driving stage circuit comprises a ground-reference signal generation circuit coupled to the buffer circuit.

9. An apparatus as claimed in claim 8 , wherein the driving stage circuit comprises an amplifier circuit coupled to the ground-reference signal generation circuit.

10. An apparatus as claimed in claim 1 , wherein the charge pump circuit is implemented in a phase locked loop.

11. An apparatus as claim in claim 6 , wherein the charge pump circuit is implemented in a phase locked loop apparatus.

12. An apparatus as claimed in claim 11 , further comprising:
a phase and frequency detector coupled to the driving stage circuit.

13. An apparatus as claimed in claim 12 , further comprising:
a low-pass filter coupled to the charge pump circuit and a voltage controlled oscillator.

14. An apparatus as claimed in claim 13 , further comprising:
a static frequency divider coupled to the voltage controlled oscillator.

15. An apparatus as claimed in claim 14 , further comprising:
a programmable frequency divider;
a digital controller having a reference frequency input and a control output, the control output being coupled to the programmable frequency divider; wherein the programmable frequency divider is coupled between the static frequency divider and the phase and frequency detector.

16. An apparatus as claimed in claim 15 , further comprising:
a reference frequency generator coupled to the digital controller and the phase and frequency detector.

17. An apparatus as claimed in claim 16 , wherein the reference frequency generator is coupled to the phase and frequency detector via a frequency divider.

18. An apparatus as claim in claim 1 , wherein the apparatus is implemented in a radar apparatus.

19. A method of manufacturing a charge pump circuit, the method comprising:
providing and arranging a first bipolar switching device and a second bipolar switching device in a differential pair configuration;
coupling a first terminal of each of the first and second bipolar switching devices to a voltage supply;
coupling a second like terminal of each of the first and second bipolar switching devices directly together at a circuit node;
coupling the circuit node to ground potential via a pulsed current source; and
coupling the first terminal of the first bipolar switching device to the voltage supply via a field effect switching device.

Assignees

• Goumballa Birama
• Montoriol Gilles
• Salle Didier
• Nxp Usa Inc

Inventors

• Goumballa Birama
• Montoriol Gilles
• Salle Didier

Classifications

• H03L7/0896 Primary

  the current generators being controlled by differential up-down pulses · CPC title

• H03K17/567

  Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title

• H03L7/18

  using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) · CPC title