Asymmetrically-switched modulation scheme

Patent metadata

Field	Value
Publication number	US-9628063-B2
Application number	US-201313966155-A
Country	US
Kind code	B2
Filing date	Aug 13, 2013
Priority date	Mar 27, 2013
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

An asymmetric modulation scheme may be used to drive two output nodes coupled to a load. The asymmetric modulation scheme may be one-sided such that the switching rate of a first output node is lower than the switching rate of a second output node. The first output node may be switched only to change a direction of current between the first output node and the second output node, while the second output node is switched to convey the information of an input signal. The asymmetric modulation scheme may be used to drive a speaker to reduce noise at the first output node to improve accuracy of current monitoring through the speaker by a current monitor coupled at the first output node.

First claim

What is claimed is:

1. An apparatus, comprising:
a processor comprising a first input node, a first output node, and a second output node,
in which the processor is configured to:
receive at least one analog signal at the first input node;
modulate the first output node at a first constant potential when the received analog signal is larger than a first threshold value and at a second constant potential when the received analog signal is smaller than a second threshold value, wherein the first constant potential is different from the second constant potential; and
modulate the second output node by switching the second output node between the first constant potential and the second constant potential corresponding to the received analog signal, wherein the second output node is switched between the first constant potential and the second constant potential while the first output node is held at either the first constant potential or the second constant potential.

2. The apparatus of claim 1 , in which the processor is configured to modulate the first node and the second node asymmetrically.

3. The apparatus of claim 1 , in which the processor is configured to modulate the first output node and the second output node according to a pulse-width modulation (PWM) scheme.

4. The apparatus of claim 1 , in which the processor is configured to modulate the first output node and the second output node according to pulse-frequency modulation (PFM) scheme.

5. The apparatus of claim 1 , in which the processor is configured to modulate the first output node and the second output node according to a combination of a pulse-width modulation (PWM) scheme and a pulse-frequency modulation (PFM) scheme.

6. The apparatus of claim 1 , in which the processor is configured to receive a differential signal at the input node.

7. The apparatus of claim 1 , further comprising a digital-to-analog converter (DAC) coupled to the first input node, the digital-to-analog converter comprising a digital input node having at least a two-bit input.

8. The apparatus of claim 1 , further comprising:
an amplifier coupled to the processor; and
a speaker coupled to the amplifier.

9. The apparatus of claim 8 , further comprising a current monitor coupled to the amplifier and to the speaker.

10. A method, comprising:
receiving at least one analog signal;
driving a first output node at a first constant potential when the received analog signal is larger than a first threshold value and at a second constant potential when the received analog signal is smaller than a second threshold value, wherein the first constant potential and the second constant potential are different; and
driving a second output node by switching the second output node between the first constant potential and the second constant potential corresponding to the received analog signal, wherein the second output node is switched between the first constant potential and the second constant potential while the first output node is held at the first constant potential while the first output node is held at either the first constant potential or the second constant potential.

11. The method of claim 10 , in which the first output node and the second output node are driven asymmetrically.

12. The method of claim 10 , in which the first output node and the second output node are driven according to a pulse-width modulation (PWM) scheme.

13. The method of claim 10 , in which the first output node and the second output node are driven according to a pulse-frequency modulation (PFM) scheme.

14. The method of claim 10 , in which the first output node and the second output node are driven according to a combination of a pulse-width modulation (PWM) scheme and a pulse-frequency modulation (PFM) scheme.

15. The method of claim 10 , in which the step of receiving at least one analog signal comprises receiving two analog signals in a differential configuration.

16. The method of claim 10 , in which the step of receiving at least one analog signal comprises receiving at least one analog signal from a digital-to-analog converter (DAC).

17. The method of claim 10 , further comprising driving current between the first output node and the second output node through a speaker.

18. The method of claim 17 , further comprising monitoring a current through the speaker.

19. An apparatus, comprising:
means for receiving a signal;
means for driving a first output node at a first constant potential when the received signal is larger than a first threshold value and at a second constant potential when the received signal is smaller than a second threshold value, wherein the first constant potential is different from the second constant potential; and
means for driving a second output node by switching the second output node between the first constant potential and the second constant potential corresponding to the received signal, wherein the means for driving the second output node switches the second output node between the first constant potential and the second constant potential while the first output node is held at either the first constant potential or the second constant potential.

20. The apparatus of claim 19 , further comprising a speaker coupled to the first driving means and the second driving means.

21. The apparatus of claim 20 , further comprising a current monitoring device coupled to the speaker.

22. The apparatus of claim 19 , in which the first driving means and the second driving means generates an asymmetrical output between the first output node and the second output node.

23. A method, comprising:
receiving a signal; and
modulating the signal onto a first node and a second node, comprising:
driving the first node at a first constant potential when the received signal is larger than a first threshold value and at a second constant potential when the received signal is smaller than a second threshold value, wherein the first constant potential is different from the second constant potential; and
driving the second node by switching the second node between the first constant potential and the second constant potential corresponding to the received signal, wherein the second output node is switched between the first constant potential and the second constant potential while the first output node is held at either the first constant potential or the second constant potential.

24. The method of claim 23 , in which the step of modulating the signal comprises modulating the signal according to at least one of a pulse-width modulation (PWM) scheme and a pulse-frequency modulation (PFM) scheme.

25. The method of claim 24 , in which a first average voltage of the first node is different from a second average voltage of the second node.

26. The method of claim 24 , in which the step of driving the first node comprises switching a voltage of the first node to change a direction of current from the first node to the second node, and in which the step of driving the second node comprises switching a voltage of the second node to represent a change of amplitude of the received signal.

27. The method of claim 26 , in which the step of switching the first node comprises switching the first node at a rate between approximately 0 hertz and approximately 20 kilohertz, and in which the step of switching the second node comprises switching the second node at a rate bet

Assignees

• Shen Dan
• Cheng Frank
• Zhang Lingli
• Cirrus Logic Inc

Inventors

• Shen Dan
• Cheng Frank
• Zhang Lingli

Classifications

• H03K7/08

  Duration or width modulation {; Duty cycle modulation} · CPC title

• H03K7/06

  Frequency or rate modulation, i.e. PFM or PRM · CPC title

• H03F3/183

  with semiconductor devices only · CPC title

• Y10T307/25

  Cross-Sectional Technologies · mapped topic

• H03F3/2173

  of the bridge type · CPC title