Oxide thin film transistor, array substrate, methods of manufacturing the same and display device

Patent metadata

Field	Value
Publication number	US-9627546-B2
Application number	US-201414535772-A
Country	US
Kind code	B2
Filing date	Nov 7, 2014
Priority date	Jul 29, 2014
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

An oxide thin film transistor, an array substrate, methods of manufacturing the same and a display device are disclosed. The oxide thin film transistor includes: a base substrate; and a gate electrode, a gate insulating layer, an oxide active layer, drain/source electrodes sequentially disposed on the base substrate. The oxide TFT transistor further includes an ultraviolet barrier layer disposed on the oxide active layer, the ultraviolet barrier layer is made of a resin material contains an ultraviolet absorbent. The stability of the oxide TFT is enhanced by disposing the ultraviolet barrier layer over the oxide active layer of the oxide TFT, since the ultraviolet barrier layer blocks the impact of UV light on the oxide TFT.

First claim

The invention claimed is:

1. An oxide thin film transistor, comprising:
a base substrate; and
a gate electrode, a gate insulating layer, an oxide active layer, drain/source electrodes sequentially disposed on the base substrate;
the oxide thin film transistor further comprising:
an ultraviolet barrier layer disposed on the oxide active layer, wherein the ultraviolet barrier layer is made of a resin material comprising an ultraviolet absorbent,
the oxide thin film transistor further comprising an etching stop layer disposed between the oxide active layer and drain/source electrodes, wherein the ultraviolet barrier layer acts as the etching stop layer, and the etching stop layer and the ultraviolet barrier layer consist of the resin material comprising the ultraviolet absorbent and are the same layer.

2. The oxide thin film transistor according to claim 1 , further comprising a first passivation layer and a first protective layer sequentially disposed on the drain/source electrodes, wherein at least one of the first passivation layer and the first protective layer is made of a resin material comprising an ultraviolet absorbent.

3. The oxide thin film transistor according to claim 2 , wherein the first passivation layer and the first protective layer are made of the resin material comprising the ultraviolet absorbent.

4. The oxide thin film transistor according to claim 1 , wherein the ultraviolet absorbent is selected from the group consisting of salicylates absorbent, benzophenone absorbent, benzotriazole absorbent, substituted acrylonitrile absorbent, triazine absorbent and hindered amine absorbent.

5. The oxide thin film transistor according to claim 1 , wherein the resin material is selected from the group consisting of epoxy resin, acrylic resin, phenolic resin polyamide resin and combination thereof.

6. The oxide thin film transistor according to claim 1 , wherein the ultraviolet absorbent in the resin material ranges from 0.1% to 10.0% by weight, and a thickness of the ultraviolet barrier layer ranges from 0.5 μm to 1.5 μm.

7. An oxide thin film transistor array substrate, comprising the oxide thin film transistor according to claim 1 .

8. The oxide thin film transistor array substrate according to claim 7 , further comprising a first electrode and a second passivation layer sequentially disposed on the oxide thin film transistor, wherein the second passivation layer is made of a resin material comprising an ultraviolet absorbent.

9. The oxide thin film transistor array substrate according to claim 7 , further comprising a first electrode, a second passivation layer, a second electrode and a second protective layer sequentially disposed on the oxide thin film transistor, wherein at least one of the second passivation layer and the second protective layer is made of a resin material comprising an ultraviolet absorbent.

10. The oxide thin film transistor array substrate according to claim 7 , further comprising a first electrode, a second passivation layer and an alignment layer sequentially disposed on the oxide thin film transistor, wherein at least one of the second passivation layer and the alignment layer is made of a resin material comprising an ultraviolet absorbent.

11. The oxide thin film transistor array substrate according to claim 10 , wherein the second passivation layer and the alignment layer are made of the resin material comprising the ultraviolet absorbent.

12. A method of manufacturing an oxide thin film transistor, comprising:
forming a gate electrode, a gate insulating layer, an oxide active layer on a base substrate; and
forming an ultraviolet barrier layer on the oxide active layer, wherein the ultraviolet barrier layer is made of a resin material comprising an ultraviolet absorbent,
the method further comprising:
forming an etching stop layer on the oxide active layer, wherein the ultraviolet barrier layer is the etching stop layer, and the etching stop layer and the ultraviolet barrier layer consist of the resin material comprising the ultraviolet absorbent and are the same layer.

13. The method according to claim 12 , further comprising:
sequentially forming drain/source electrodes, a first passivation layer and a first protective layer on the oxide active layer, wherein at least one of the first passivation layer and the first protective layer is made of a resin material comprising an ultraviolet absorbent.

14. The method according to claim 13 , wherein the first passivation layer and the first protective layer are made of the resin material comprising the ultraviolet absorbent.

15. The method according to claim 12 , wherein the ultraviolet absorbent is selected from the group consisting of salicylate absorbent, benzophenone absorbent, benzotriazole absorbent, substituted acrylonitrile absorbent, triazine absorbent or hindered amine absorbent.

16. The method according to claim 12 , wherein the resin material is selected from a group consisting of epoxy resin, acrylic resin, phenolic resin, polyamide resin and combination thereof.

17. The method according to claim 12 , wherein the ultraviolet absorbent in the resin material ranges from 0.1% to 10.0% by weight, and a thickness of the ultraviolet barrier layer ranges from 0.5 μm to 1.5 μm.

18. The method according to claim 12 , wherein forming the ultraviolet barrier layer comprising:
adding the ultraviolet absorbent into a resin material to form a mixture; and
coating and curing the mixture to form the ultraviolet barrier layer.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Wang Can
• Liu Fang

Classifications

• H10P14/683

  carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC · CPC title

• H10W42/20

  protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title

• H01L21/02118

  Electricity · mapped topic

• H01L29/24

  Electricity · mapped topic

• H01L29/7869 Primary

  Electricity · mapped topic