Method for manufacturing semiconductor memory device and semiconductor memory device

US9627401B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9627401-B2
Application numberUS-201514639084-A
CountryUS
Kind codeB2
Filing dateMar 4, 2015
Priority dateOct 30, 2014
Publication dateApr 18, 2017
Grant dateApr 18, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality of second holes in a stacked body. The stacked body includes a plurality of first layers and a plurality of second layers. The method includes etching a portion between the second holes next to each other in the stacked body, and connecting at least two or more second holes to form a groove. The method includes forming a film including a charge storage film on a sidewall of the first holes. The method includes forming a channel film on a sidewall of the film including the charge storage film.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor memory device comprising: a stacked body including a plurality of electrode layers stacked with insulators interposed between the electrode layers; a columnar portion penetrating in the stacked body in a stacking direction of the stacked body, the columnar portion including a semiconductor film extending in the stacking direction, and a cylindrical film provided between the electrode layers and the semiconductor film; and a separation portion extending in the stacking direction and in a first direction intersecting the stacking direction and separating the stacked body into a first portion and a second portion of the stacked body in a second direction intersecting the stacking direction and the first direction, the separation portion being disposed between the first portion and the second portion of the stacked body, the first portion and the second portion having a pair of sidewalls facing each other with the separation portion interposed, a width in the second direction between the pair of sidewalls being larger than a diameter of the columnar portion, the sidewalls having shapes in which a plurality of concave portions are disposed in the first direction, the plurality of concave portions being arranged periodically in the first direction. 2. The device according to claim 1 , wherein the plurality of concave portions have curvature. 3. The device according to claim 1 , wherein the separation portion includes: a conductive layer; and an insulating film provided between the electrode layers and the conductive layer. 4. The device according to claim 3 , further comprising a substrate provided below the stacked body, a lower end of the semiconductor film and a lower end of the conductive layer being in contact with the substrate, wherein the semiconductor film and the conductive layer are electrically connected to each other through the substrate. 5. The device according to claim 1 , wherein the columnar portion includes a plurality of first columnar portions and a plurality of second columnar portions, the plurality of first columnar portions being provided in the first portion of the stacked body and adjacent to the separation portion, the plurality of second columnar portions being provided in the second portion of the stacked body and adjacent to the separation portion, and the plurality of concave portions are arranged in the first direction in a same pitch as the plurality of first columnar portions and the plurality of second columnar portions both arranged in the first direction. 6. The device according to claim 1 , wherein the sidewalls have shapes in which each of the plurality of concave portions extends in the stacking direction. 7. The device according to claim 1 , wherein a plurality of the columnar portions are arranged in a staggered arrangement in the stacked body. 8. The device according to claim 7 , wherein the sidewalls include a sidewall on the first portion side and a sidewall on the second portion side, the plurality of concave portions are disposed on each of the sidewall on the first portion side and the sidewall on the second portion side. 9. The device according to claim 8 , wherein the sidewall on the first portion side and the sidewall on the second portion side have shapes in which the plurality of concave portions are disposed at different positions from each other in the first direction. 10. The device according to claim 9 , wherein the columnar portion includes a plurality of first columnar portions and a plurality of second columnar portions, the plurality of first columnar portions being arranged in the first direction adjacent to the separation portion in the first portion of the stacked body, the plurality of second columnar portions being arranged in the first direction adjacent to the separation portion in the second portion of the stacked body, the plurality of first columnar portions are arranged in a position relationship with a half pitch shifted in the first direction from a plurality of first concave portions disposed at the sidewall on the first portion side, the plurality of second columnar portions are arranged in a position relationship with a half pitch shifted in the first direction from a plurality of second concave portions disposed at the sidewall on the second portion side. 11. The device according to claim 10 , wherein the plurality of first concave portions are arranged at positions corresponding to the plurality of second columnar portions in the first direction, the plurality of second concave portions are arranged at positions corresponding to the plurality of first columnar portions in the first direction. 12. A semiconductor memory device comprising: a stacked body including a plurality of electrode layers stacked with insulators interposed between the electrode layers; a plurality of columnar portions arranged in a staggered arrangement so as to penetrate in the stacked body in a stacking direction of the stacked body, each of the plurality of columnar portions including a semiconductor film extending in the stacking direction, and a cylindrical film provided between the electrode layers and the semiconductor film; and a separation portion extending in the stacking direction and in a first direction intersecting the stacking direction, and separating the stacked body into a first portion and a second portion of the stacked body in a second direction intersecting the stacking direction and the first direction, the separation portion being disposed between the first portion and the second portion of the stacked body so that the first portion and the second portion have a pair of sidewalls facing each other with the separation portion interposed, the pair of sidewalls including a sidewall on the first portion side and a sidewall on the second portion side, a plurality of first concave portions being disposed at the sidewall on the first portion side along the first direction, a plurality of second concave portions being disposed at the sidewall on the second portion side along the first direction, positions in the first direction of the plurality of first concave portions being shifted from positions in the first direction of the plurality of second concave portions. 13. The device according to claim 12 , wherein the plurality of columnar portions include a plurality of first columnar portions and a plurality of second columnar portions, the plurality of first columnar portions being arranged in the first direction adjacent to the separation portion in the first portion of the stacked body, the plurality of second columnar portions being arranged in the first direction adjacent to the separation portion in the second portion of the stacked body, the plurality of first columnar portions are arranged in a position relationship with a half pitch shifted in the first direction from the plurality of first concave portions disposed at the sidewall on the first portion side, the plurality of second columnar portions are arranged in a position relationship with a half pitch shifted in the first direction from the plurality of second concave portions disposed at the sidewall on the second portion side. 14. The device according to claim 13 , wherein the plurality of first concave portions are arranged at positions corresponding to the plurality of second columnar portions in the first direction, the plurality of second concave portions are arranged at positions corresponding to the plurality of first columnar portions in the first direction. 15. The device according to claim 12 , wherein the plural

Assignees

Inventors

Classifications

  • using masks for insulating materials · CPC title

  • by chemical means · CPC title

  • the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

  • the material being a silicon oxide, e.g. SiO2 · CPC title

  • Electricity · mapped topic

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9627401B2 cover?
According to one embodiment, a method for manufacturing a semiconductor memory device includes simultaneously forming a plurality of first holes and a plurality of second holes in a stacked body. The stacked body includes a plurality of first layers and a plurality of second layers. The method includes etching a portion between the second holes next to each other in the stacked body, and connec…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H01L27/11582. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 18 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).