Semiconductor device and method of fabricating the same

Patent metadata

Field	Value
Publication number	US-9627247-B2
Application number	US-201514729843-A
Country	US
Kind code	B2
Filing date	Jun 3, 2015
Priority date	Jun 3, 2015
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

Provided is a method of fabricating a semiconductor device, including the following. A first material layer, a second material layer and a mask layer are formed on a substrate. A portion of the second material layer is removed by performing a first etching process with the mask layer as a mask, so as to expose the first material layer and form a first pattern layer and a second pattern layer. A portion of the first material layer is removed by performing a second etching process with the mask layer as a mask, so as to expose a portion of the substrate. A portion of the substrate is removed by performing a third etching process with the mask layer as a mask, so as to form first trenches and second trenches. Sidewalls of the second trenches and a surface of the substrate form at least two different angles.

First claim

What is claimed is:

1. A fabricating method of a semiconductor device, the fabricating method comprising:
forming a plurality of material layers on a substrate, wherein the material layers comprise different materials;
forming a mask layer on the material layers; and
forming a first trench and a second trench in the substrate by performing a plurality of etching processes using different etchants with the mask layer as a mask, wherein at least a first angle and a second angle are formed between a sidewall of the second trench and a surface of the substrate, and a third angle and a fourth angle are formed between a sidewall of the first trench and the surface of the substrate,
wherein the first angle is an angle between an inner surface of an upper sidewall of the second trench and a first dividing line, the second angle is an angle between an inner surface of a lower sidewall of the second trench and a second dividing line, the third angle is an angle between an inner surface of an upper sidewall of the first trench and the first dividing line, and the fourth angle is an angle between an inner surface of a lower sidewall of the first trench and a third dividing line, and
wherein the first dividing line is a line connecting dividing points between an upper portion and a lower portion of the second trench, the second dividing line is a line connecting a bottom of the second trench, and the third dividing line is a line connecting a bottom of the first trench, wherein the first angle, the second angle, the third angle, and the fourth angle satisfy the following formula (1):
Max the third angle−the fourth angle|<Max|the first angle−the second angle|  formula (1).

2. The fabricating method according to claim 1 , wherein the third angle is greater than the first angle and the second angle, and the fourth angle is greater than the first angle and the second angle.

3. A semiconductor device, comprising:
a substrate comprising a first region and a second region located in a periphery of the first region, wherein the first region comprises a plurality of first trenches under a surface of the substrate, and the second region comprises a plurality of second trenches under the surface of the substrate;
a first pattern layer disposed on the surface of the substrate in the first region; and
a second pattern layer disposed on the surface of the substrate in the second region,
wherein at least two different angles are formed between a sidewall of the second trench and the surface of the substrate,
wherein at least a first angle and a second angle are formed between the sidewall of the second trench and the surface of the substrate, and a third angle and a fourth angle are formed between a sidewall of the first trench and the surface of the substrate,
wherein the first angle is an angle between an inner surface of an upper sidewall of the second trench and a first dividing line, the second angle is an angle between an inner surface of a lower sidewall of the second trench and a second dividing line, the third angle is an angle between an inner surface of an upper sidewall of the first trench and the first dividing line, and the fourth angle is an angle between an inner surface of a lower sidewall of the first trench and a third dividing line, and
wherein the first dividing line is a line connecting dividing points between an upper portion and a lower portion of the second trench, the second dividing line is a line connecting bottoms of the second trenches, and the third dividing line is a line connecting bottoms of the first trenches, wherein the first angle, the second angle, the third angle, and the fourth angle satisfy the following formula (1):
Max the third angle−the fourth angle|<Max|the first angle−the second angle  formula (1).

4. The semiconductor device according to claim 3 , wherein the first angle is greater than the second angle.

5. The semiconductor device according to claim 3 , wherein the third angle is greater than the first angle and the second angle, and the fourth angle is greater than the first angle and the second angle.

6. The semiconductor device according to claim 3 , wherein a fifth angle and a sixth angle are formed between a sidewall of the second pattern layer and the surface of the substrate, and the fifth angle is different from the sixth angle,
wherein the fifth angle is an angle between an inner surface of an upper sidewall of the second pattern layer and a fourth dividing line, and the sixth angle is an angle between an inner surface of a lower sidewall of the second pattern layer and a fifth dividing line, and
wherein the fourth dividing line is a line connecting dividing points between an upper portion and a lower portion of the second pattern layer, and the fifth dividing line is a line connecting an interface between a first material layer and the first pattern layer, and an interface between the first material layer and the second pattern layer, wherein the first material layer is between the substrate and the first patterned layer and between the substrate and the second patterned layer.

7. The semiconductor device according to claim 6 , wherein the fifth angle is smaller than the sixth angle.

8. The semiconductor device according to claim 3 , wherein the sidewall of the first trench comprises a first shoulder portion, and the sidewall of the second trench comprises a second shoulder portion, wherein the first shoulder portion is closer to a first material layer than the second shoulder portion, wherein the first material layer is between the substrate and the first patterned layer and between the substrate and the second patterned layer.

Assignees

• Macronix Int Co Ltd

Inventors

• Hsu Fang-Hao
• Lee Hong-Ji

Classifications

• H10P50/695

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• H10P50/692

  characterised by their composition, e.g. multilayer masks or materials · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/268

  of silicon-containing layers · CPC title

• H10P50/242

  of Group IV materials · CPC title