Method of double patterning lithography process using plurality of mandrels for integrated circuit applications

Patent metadata

Field	Value
Publication number	US-9627206-B2
Application number	US-201514937366-A
Country	US
Kind code	B2
Filing date	Nov 10, 2015
Priority date	Nov 22, 2013
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A method includes performing a double patterning process to form a first mandrel, a second mandrel, and a third mandrel, with the third mandrel being between the first mandrel and the second mandrel, and etching the third mandrel to cut the third mandrel into a fourth mandrel and a fifth mandrel, with an opening separating the fourth mandrel from the fifth mandrel. A spacer layer is formed on sidewalls of the first, the second, the fourth, and the fifth mandrels, wherein the opening is fully filled by the spacer layer. Horizontal portions of the spacer layer are removed, with vertical portions of the spacer layer remaining un-removed. A target layer is etched using the first, the second, the fourth, and the fifth mandrels and the vertical portions of the spacer layer as an etching mask, with trenches formed in the target layer. The trenches are filled with a filling material.

First claim

What is claimed is:

1. A method comprising:
forming a mandrel encircling a first opening and a second opening, wherein the first opening and the second opening are separated from each other by a first mandrel strip;
etching a middle portion of the first mandrel strip to form a third opening connecting the first opening to the second opening, wherein the first mandrel strip comprises a first portion and a second portion remaining on opposite sides of the third opening;
forming a blanket spacer layer over the mandrel;
etching horizontal portions of the blanket spacer layer to form spacers, wherein the third opening is fully filled by the spacers, and the first opening and the second opening are narrowed by the spacers;
etching the first portion and the second portion of the first mandrel strip to form a fifth opening and a sixth opening encircled by the mandrel and the spacers;
using the mandrel and the spacers as an etching mask to etch a target layer, with trenches formed in the target layer; and
filling the trenches with a filling material.

2. The method of claim 1 , wherein the forming the mandrel comprises:
forming a blanket mandrel layer over the target layer;
performing a first etching to remove some portions of the blanket mandrel layer; and
performing a second etching on remaining portions of the blanket mandrel layer to form the mandrel.

3. The method of claim 1 further comprising, removing the mandrel and the spacers.

4. The method of claim 1 further comprising, after the etching the horizontal portions of the blanket spacer layer and before the target layer is etched, removing a second mandrel strip parallel to the first mandrel strip.

5. The method of claims further comprising, when the fifth opening and the sixth opening are formed, simultaneously etching a portion of the mandrel to form a third mandrel strip parallel to the first mandrel strip.

6. The method of claim 1 , wherein the target layer comprises a dielectric material, and wherein the filling the trenches comprises filling a metallic material.

7. The method of claim 1 , wherein the mandrel comprise amorphous silicon.

8. A method comprising:
forming a mandrel layer over a target layer;
patterning the mandrel layer to form a first opening in the mandrel layer, wherein the first opening has an I-shape and comprises:
two parallel portions; and
a connecting portion interconnecting the two parallel portions;

forming spacers on sidewalls of the first opening, wherein the spacers fill an entirety of the connecting portion, and the two parallel portions are narrowed by the spacers;
etching the mandrel layer to remove portions of the mandrel layer on opposite ends of the connecting portion to form a second opening and a third opening, wherein the second opening and the third opening are between the two parallel portions of the first opening; and
extending the two parallel portions of the first opening, the second opening, and the third opening into the target layer, wherein in the extending, the mandrel layer and the spacers in combination are used as an etching mask for etching the target layer.

9. The method of claim 8 further comprising:
etching a hard mask underlying the mandrel layer to extend the second opening, the third opening, and remaining portions of the first opening into the hard mask, wherein the target layer is etched using the hard mask as an etching mask.

10. The method of claim 8 further comprising, after the second opening, the third opening, and remaining portions of the first opening are extended into the target layer, filling the first opening and the second opening with a material different from the target layer.

11. The method of claim lo further comprising removing the spacers.

12. The method of claim 8 , wherein the forming the spacers comprises:
forming a spacer layer having a thickness equal to or greater than a half of a width of the connecting portion of the first opening; and
performing an anisotropic etching on the spacer layer, wherein portions of the spacer layer remaining after the anisotropic etching are the spacers.

13. The method of claim 8 , wherein the patterning the mandrel layer to form the first opening comprises:
performing a first lithography-and-etching process to form a first one of the two parallel portions; and
performing a second lithography-and-etching process to form a second one of the two parallel portions.

14. The method of claim 8 , wherein when the two parallel portions are narrowed by the spacers, the two parallel portions have portions unfilled by the spacers, and the unfilled portions are at a same level as the mandrel layer.

15. A method comprising:
forming a mandrel layer over a target layer;
performing lithography-and-etching processes to pattern the mandrel layer, with remaining portions of the mandrel layer comprising a first mandrel, a second mandrel, and a third mandrel parallel to each other, with the second mandrel being between the first mandrel and the third mandrel;
etching the second mandrel to cut the second mandrel into a fourth mandrel and a fifth mandrel, with an opening separating the fourth mandrel from the fifth mandrel;
forming a blanket spacer layer over the first mandrel, the second mandrel, the fourth mandrel, and the fifth mandrel; and
performing an anisotropic etching on the blanket spacer layer, wherein the opening is fully filled by a remaining portion of the blanket spacer layer.

16. The method of claim 15 further comprising:
using the first mandrel, the second mandrel, the fourth mandrel, and the fifth mandrel and the remaining portions of the blanket spacer layer as an etching mask to etch the target layer, with trenches formed in the target layer; and
filling the trenches with a filling material.

17. The method of claim 16 , wherein the target layer comprises a dielectric material, and the filling the trenches comprises filling a metallic material to form metal lines and vias.

18. The method of claim 15 , wherein the first mandrel, the second mandrel, and the third mandrel comprise amorphous silicon.

19. The method of claim 15 further comprising, after the anisotropic etching and before the target layer is etched, removing a sixth mandrel parallel to the first mandrel.

20. The method of claim 15 further comprising, after the anisotropic etching and before a layer underlying the blanket spacer layer is etched, removing a first portion of a sixth mandrel, with a second portion of the sixth mandrel remaining.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lee Chung-Ju
• Yao Hsin-Chieh
• Shue Shau-Lin
• Bao Tien-I
• Wu Yung-Hsu

Classifications

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W72/623

  characterised by the structures of the outermost layers, e.g. multilayered coatings · CPC title

• H10W72/323

  characterised by the structures of the outermost layers, e.g. multilayered coatings · CPC title