Hardware and firmware paths for performing memory read processes

Patent metadata

Field	Value
Publication number	US-9626286-B2
Application number	US-201414506067-A
Country	US
Kind code	B2
Filing date	Oct 3, 2014
Priority date	Oct 3, 2014
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A storage module may include a controller that has hardware path that includes a plurality of hardware modules configured to perform a plurality of processes associated with execution of a host request. The storage module may also include a firmware module having a processor that executes firmware to perform at least some of the plurality of processes performed by the hardware modules. The firmware module performs the processes when the hardware modules are not able to successfully perform them.

First claim

We claim:

1. A storage system comprising:
at least one memory;
a controller in communication with the at least one memory, wherein the controller comprises:
a hardware path comprising a plurality of hardware modules, each hardware module configured to perform a different one of a plurality of processes associated with executing host read requests, the plurality of processes comprising address translation and data retrieval command generation, the plurality of hardware modules comprising hardware circuits that do not execute software to perform the plurality of processes; and
a firmware module comprising:
firmware stored in the at least one memory; and
a processor configured execute the firmware to perform the plurality of processes associated with executing host read requests; and

a front-end module configured to:
receive a host command; and
in response to receipt of the host command, determine whether to start execution of the host command along the hardware path or with the firmware module.

2. The storage system of claim 1 , wherein the front-end module is configured to determine to start the execution of the host command along the hardware path in response to an identification that the host command is a host read request to read data stored in the at least one memory.

3. The storage system of claim 2 , wherein the front-end module is further configured to start the execution of the host read request along the hardware path responsive to a size of the data not exceeding a threshold amount.

4. The storage system of claim 3 , wherein the threshold amount corresponds to a maximum amount of data that is retrievable by generation of a single set of data retrieval commands.

5. The storage system of claim 2 , wherein the plurality of hardware modules comprises an address translation hardware module, wherein the front-end module is further configured to:
identify logical address information associated with the host read request; and
responsive to the logical address information comprising a number of one or more logical group numbers that does not generate a threshold number, send the logical address information to the address translation hardware module to identify a physical address mapped to the logical address information.

6. The storage system of claim 5 , wherein the threshold number is one.

7. The storage system of claim 5 , wherein the address translation hardware module is configured to query at least one address data structure to identify the physical address mapped to the logical address information.

8. The storage system of claim 7 , wherein the at least one address data structure comprises at least one of a secondary address data structure and a primary address data structure.

9. The storage system of claim 7 , wherein the address translation hardware module is configured to query the at least one address data structure with only a single logical group number associated with the host read request.

10. The storage system of claim 7 , wherein the physical address comprises a first physical address, the at least one address data structure comprises at least one first address data structure,
the front-end module is further configured to send the logical address information to the firmware module, and
the firmware module is further configured to query at least one second address data structure to identify a second physical address mapped to the logical address information.

11. The storage system of claim 10 , wherein the plurality of hardware modules further comprises a data retrieval hardware module configured to retrieve the data,
the address translation hardware module is further configured to send the first physical address to the data retrieval hardware module to retrieve a first version of the data stored at the first physical address; and
the firmware module is further configured to:
responsive to the query of the at least one second address data structure not returning the second physical address, permit the data retrieval hardware module to retrieve the first version of the data; and
responsive to the query of the at least one second address data structure returning the second physical address, determine whether to instruct the data retrieval hardware module to retrieve a second version of the data stored at the second physical address, or disable the data retrieval hardware module and retrieve the second version of the data.

12. The storage system of claim 11 , wherein the firmware module is configured to instruct the data retrieval hardware module to retrieve the second version of the data responsive to retrieval of the data requiring issuance of a single set of data retrieval commands to retrieve the second version of the data.

13. The storage system of claim 1 , wherein the plurality of hardware modules comprises a post data retrieval hardware module configured to:
perform an initial determination of whether data received from the at least one memory has a bit error rate above a threshold level; and
responsive to the bit error rate being above the threshold level, send the data to the firmware module for error recovery.

14. The storage system of claim 1 , wherein the front-end module is one of the plurality of hardware modules in the hardware path.

15. The storage system of claim 1 , wherein one or more of the at least one memory comprises three-dimensional memory.

16. The storage system of claim 1 , wherein the controller is on the same substrate as memory elements of the at least one memory.

17. A method of executing a host read request in a storage system comprising at least one memory, the method comprising:
in a controller of the storage system:
receiving the host read request to read data stored in the storage system;
sending the host read request to a hardware path comprising an address translation hardware module comprising a hardware circuit that does not execute software;
querying, with the address translation hardware module, at least one address data structure to identify a physical address; and
in response to the address translation hardware module being unable to identify the physical address, sending, with the address translation hardware module, a notification to a firmware module comprising a processor that executes firmware;
in response to the notification, querying, with the firmware module, the at least one address data structure to identify the physical address;
sending, with the firmware module, the identified physical address to a data retrieval hardware module of the hardware path; and
with the data retrieval hardware module, retrieving from the at least one memory data stored at the physical address identified by the querying performed with the firmware module.

18. A storage system comprising:
at least one memory; and
a controller comprising a plurality of host request modules, each configured to perform a different one of a plurality of processes associated with execution of a host read request, the plurality of processes comprising at least two of: host command type identification, data size identification, logical address information identification, address translation, data retrieval command generation, or post data retrieval processing, and wherein the plurality of host request modules comprises:
a first host request module comprising:
a first hardware module configured to perform a first process of the plurality of processes associated with execution of the host read request; and
a first firmware module comprising first firmware stored in the at least one memory, and a f

Assignees

• Sandisk Technologies Inc
• Sandisk Technologies Llc

Inventors

• Gorobets Sergey Anatolievich
• Davidson Matthew
• Lin Gary J
• Tuers Daniel
• Jackson Robert

Classifications

• G06F3/0688

  Non-volatile semiconductor memory arrays · CPC title

• G06F3/0658

  Controller construction arrangements · CPC title

• G06F3/0626

  Reducing size or complexity of storage systems · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F13/1668

  Details of memory controller · CPC title