Method and system for using a ROM patch

Patent metadata

Field	Value
Publication number	US-9626179-B2
Application number	US-201414336528-A
Country	US
Kind code	B2
Filing date	Jul 21, 2014
Priority date	Jul 21, 2014
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A method and system for using a ROM patch are provided. In one embodiment, a computing device obtains an original assembly code and a modified assembly code which is a modified version of the original assembly code, the original assembly code being used for an executable code which is stored in a ROM of a device. The computing device compares the original assembly code and the modified assembly code to identify difference(s) in the modified assembly code with respect to the original assembly code. The computing device then compiles the difference(s) (sometimes, after adjusting the differences) and generates a ROM patch by converting the compiled difference(s) into a replacement executable code for some of the executable code stored in the ROM of the device. In another embodiment, a method and system for using a ROM patch are disclosed.

First claim

What is claimed is:

1. A method for using a read-only memory (ROM) patch, the method comprising:
performing the following in a device comprising read-only memory (ROM) storing executable code:
analyzing an address in a command to read a line of the executable code from the ROM to determine if the address is in a ROM patch table;
in response to determining that the address is not in the ROM patch table, reading the line of the executable code from the address in the ROM; and
in response to determining that the address is in the ROM patch table, reading a replacement address in a ROM patch instead of reading the line of the executable code from the address in the ROM, wherein the replacement address is specified in the ROM patch table;
wherein the ROM patch is generated by:
obtaining an original assembly code and a modified assembly code which is a modified version of the original assembly code, the original assembly code being used for an executable code which is stored in the ROM of the device;
comparing the original assembly code and the modified assembly code to identify difference(s) in the modified assembly code with respect to the original assembly code;
compiling the difference(s);
converting the compiled difference(s) into a replacement executable code for some of the executable code stored in the ROM of the device; and
modifying an address in a jump command in the modified executable code to point to an address in the original assembly code, if the address in the original assembly code contains the same data as the address in the jump command.

2. The method of claim 1 , wherein the device further comprises a read access memory (RAM) and a non-volatile memory, the non-volatile memory storing the ROM patch, and wherein the method further comprises loading the ROM patch from the non-volatile memory into RAM.

3. The method of claim 1 further comprising receiving the ROM patch from a network port.

4. The method of claim 1 further comprising generating the ROM patch table from metadata associated with the ROM patch.

5. The method of claim 1 further comprising generating a line of executable code with a jump into the replacement address.

6. The method of claim 1 , wherein the device further comprises a patch execution unit that determines if the address is in the ROM patch table.

7. The method of claim 6 , wherein the patch execution unit comprises a fetcher, a look-up table, a multiplexor, and a jump instruction generator.

8. The method of claim 1 , wherein the ROM patch table is stored as a hash table.

9. The method of claim 1 , wherein the ROM patch replaces individual lines of code rather than complete functions.

10. The method of claim 1 , wherein the device is a storage module.

11. The method of claim 10 , wherein the storage module is embedded in a host.

12. The method of claim 10 , wherein the storage module is removably connected to a host.

13. The method of claim 1 , wherein the device comprises a non-volatile memory that has a three-dimensional configuration.

14. A device comprising:
read-only memory (ROM) configured to store executable code; and
a patch execution unit configured to
analyze an address in a command to read a line of the executable code from the ROM to determine if the address is in a ROM patch table;
in response to determining that the address is not in the ROM patch table, read the line of the executable code from the address in the ROM; and
in response to determining that the address is in the ROM patch table, read a replacement address in a ROM patch instead of reading the line of the executable code from the address in the ROM, wherein the replacement address is specified in the ROM patch table;
wherein the ROM patch is generated by:
obtaining an original assembly code and a modified assembly code which is a modified version of the original assembly code, the original assembly code being used for an executable code which is stored in the ROM of the device;
comparing the original assembly code and the modified assembly code to identify difference(s) in the modified assembly code with respect to the original assembly code;
compiling the difference(s);
converting the compiled difference(s) into a replacement executable code for some of the executable code stored in the ROM of the device; and
modifying an address in a jump command in the modified executable code to point to an address in the original assembly code, if the address in the original assembly code contains the same data as the address in the jump command.

15. The device of claim 14 , further comprising: a read access memory (RAM) and a non-volatile memory, the non-volatile memory storing the ROM patch, and wherein the ROM patch is loaded from the non-volatile memory into RAM.

16. The device of claim 14 , wherein the ROM patch is received from a network port.

17. The device of claim 14 , wherein the ROM patch table is generated from metadata associated with the ROM patch.

18. The device of claim 14 , wherein the patch execution unit is further configured to generate a line of executable code with a jump into the replacement address.

19. The device of claim 14 , wherein the patch execution unit comprises a fetcher, a look-up table, a multiplexor, and a jump instruction generator.

20. The device of claim 14 , wherein the ROM patch table is stored as a hash table.

21. The device of claim 14 , wherein the ROM patch replaces individual lines of code rather than complete functions.

22. The device of claim 14 , wherein the device is a storage module.

23. The device of claim 22 , wherein the storage module is embedded in a host.

24. The device of claim 22 , wherein the storage module is removably connected to a host.

25. The device of claim 14 further comprising a non-volatile memory having a three-dimensional configuration.

Assignees

• Sandisk Technologies Inc
• Sandisk Technologies Llc

Inventors

• Bar-Or Shahar

Classifications

• G06F8/66 Primary

  of program code stored in read-only memory [ROM] · CPC title