Leakage current supply circuit for reducing low drop-out voltage regulator headroom

US9625924B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9625924-B2
Application numberUS-201514860717-A
CountryUS
Kind codeB2
Filing dateSep 22, 2015
Priority dateSep 22, 2015
Publication dateApr 18, 2017
Grant dateApr 18, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Systems and methods relate to a low-dropout voltage (LDO) voltage regulator which receives a maximum supply voltage and provides a regulated voltage to a load, where the load may be a processing core of a multi-core processing system. A leakage current supply source includes a leakage current sensor to determine a leakage current demand of the load of the LDO voltage regulator and a leakage current supply circuit to supply the leakage current demand. In this manner, the leakage current supply source provides current assistance to the LDO voltage regulator, such that the LDO voltage regulator can supply only dynamic current. Thus, headroom voltage of the LDO voltage regulator, which is a difference between the maximum supply voltage and the regulated voltage, can be reduced. Reducing the headroom voltage allows greater number of dynamic voltage and frequency scaling states of the load.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of operating a low-dropout voltage (LDO) voltage regulator, the method comprising: determining a leakage current demand of a load of the LDO voltage regulator; and supplying leakage current from a leakage current supply source to meet the leakage current demand of the load of the LDO voltage regulator. 2. The method of claim 1 , comprising receiving a maximum supply voltage as an input of the LDO voltage regulator and providing an output voltage to the load of the LDO voltage regulator, wherein supplying the leakage current from a leakage current supply source comprises reducing a headroom voltage of the LDO voltage regulator, wherein the headroom voltage of the LDO voltage regulator is a difference between the maximum supply voltage and the output voltage provided to the load of the LDO voltage regulator. 3. The method of claim 1 , wherein determining the leakage current demand of the load of the LDO voltage regulator comprises sensing leakage current of the load based on temperature, voltage, and process corners related to the load. 4. The method of claim 3 , further comprising determining a frequency of a ring oscillator based on the sensed leakage current of the load. 5. The method of claim 1 , further comprising converting the sensed leakage current to a digital code. 6. The method of claim 5 , further comprising determining, from the digital code, a number of p-channel metal oxide semiconductor (PMOS) transistors to be switched on to supply the leakage current from the leakage current supply source. 7. The method of claim 6 comprising increasing the number of PMOS transistors to be switched on for higher values of the digital code and decreasing the number of PMOS transistors to be switched on for lower values of the digital code. 8. The method of claim 1 , wherein the load of the LDO voltage regulator is a processing core of a multi-core processing system. 9. An apparatus comprising: a leakage current supply source comprising: a leakage current sensor configured to determine a leakage current demand of a load of a low-dropout voltage (LDO) voltage regulator; and a leakage current supply circuit configured to supply leakage current to meet the leakage current demand of the load of the LDO voltage regulator. 10. The apparatus of claim 9 , wherein the low-dropout voltage (LDO) voltage regulator is configured to receive a maximum supply voltage and provide an output voltage to the load of the LDO voltage regulator. 11. The apparatus of claim 10 , wherein the leakage current supply source is configured to reduce a headroom voltage of the LDO voltage regulator, wherein the headroom voltage of the LDO voltage regulator is a difference between the maximum supply voltage and the output voltage provided to the load of the LDO voltage regulator. 12. The apparatus of claim 9 , wherein the leakage current sensor is configured to sense the leakage current demand of the load of the LDO voltage regulator based on temperature, voltage, and process corners related to the load. 13. The apparatus of claim 12 , wherein the leakage current sensor comprises a ring oscillator, wherein a frequency of the ring oscillator is based on the sensed leakage current demand of the load. 14. The apparatus of claim 13 , wherein the ring oscillator comprises an odd number of inverters connected in a ring. 15. The apparatus of claim 14 , wherein the inverters are current-starved based on head switches, foot switches, or a combination thereof, configured to allow only leakage current to pass through. 16. The apparatus of claim 14 , wherein the inverters are differential inverters. 17. The apparatus of claim 12 , wherein the leakage current sensor comprises an analog to digital converter (ADC) configured to convert the sensed leakage current demand to a digital code. 18. The apparatus of claim 12 , further comprising a finite state machine (FSM) configured to determine, from the digital code, a number of p-channel metal oxide semiconductor (PMOS) transistors to be switched on in order to supply the leakage current from the leakage current supply circuit. 19. The apparatus of claim 18 wherein the number of PMOS transistors to be switched on is higher for higher values of the digital code and the number of PMOS transistors to be switched on is lower for lower values of the digital code. 20. The apparatus of claim 9 , wherein the load of the LDO voltage regulator is a processing core of a multi-core processing system. 21. The apparatus of claim 9 , integrated in integrated into a device selected from the group consisting of a set top box, music player, video player, entertainment unit, navigation device, communications device, personal digital assistant (PDA), fixed location data unit, mobile phone, and a computer. 22. A system comprising: means for determining a leakage current demand of a load of a means for regulating voltage; and means for supplying leakage current to meet the leakage current demand of the load. 23. The system of claim 22 , wherein the means for determining the leakage current demand of the load comprises means for sensing the leakage current demand of the load based on temperature, voltage, and process corners related to the load. 24. The system of claim 23 , further comprising means for converting the sensed leakage current demand to a digital code. 25. The system of claim 24 , further comprising means for determining, from the digital code, a number of p-channel metal oxide semiconductor (PMOS) transistors to be switched on in order to supply the leakage current demand of the load.

Assignees

Inventors

Classifications

  • G05F1/56Primary

    using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

  • Arrangements for reducing power consumption · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9625924B2 cover?
Systems and methods relate to a low-dropout voltage (LDO) voltage regulator which receives a maximum supply voltage and provides a regulated voltage to a load, where the load may be a processing core of a multi-core processing system. A leakage current supply source includes a leakage current sensor to determine a leakage current demand of the load of the LDO voltage regulator and a leakage cur…
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification G05F1/56. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 18 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).