Power semiconductor package with conductive clips

Patent metadata

Field	Value
Publication number	US-9620471-B2
Application number	US-201514723378-A
Country	US
Kind code	B2
Filing date	May 27, 2015
Priority date	Sep 13, 2004
Publication date	Apr 11, 2017
Grant date	Apr 11, 2017

Abstract

A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.

First claim

What is claimed is:

1. A semiconductor package comprising:
a semiconductor die that includes a power device having at least a first power electrode and a second power electrode over a top surface of said semiconductor die, each power electrode including spaced power fingers originating from each respective power electrode;
a first conductive clip over said top surface of said semiconductor die and coupled to said first power electrode, said first conductive clip including a first mounting surface and a first plurality of spaced fingers;
a second conductive clip coupled to said second power electrode, said second conductive clip including a second mounting surface and a second plurality of spaced fingers being coplanar with said first plurality of spaced fingers, and said second mounting surface of said second conductive clip being coplanar with said first mounting surface of said first conductive clip such that said semiconductor die is configured for surface mounting.

2. The semiconductor package of claim 1 , further comprising a passivation body encapsulating said semiconductor die.

3. The semiconductor package of claim 1 , wherein said semiconductor die comprises a III-nitride semiconductor.

4. The semiconductor package of claim 3 , wherein said III-nitride semiconductor is an alloy of InAlGaN.

5. The semiconductor package of claim 1 , wherein said power fingers are arranged in an interdigited pattern.

6. The semiconductor package of claim 1 further comprising a control electrode, and a first conductive control clip coupled to said control electrode.

7. The semiconductor package of claim 1 further comprising a current sense electrode, and a current sense clip coupled to said current sense electrode.

8. The semiconductor package of claim 1 , wherein said semiconductor die includes a first control electrode, and a first conductive control clip coupled to said first control electrode; and a second control electrode, and a second conductive control clip coupled to said second control electrode.

9. The semiconductor package of claim 8 further comprising at least one current sense electrode, and a current sense clip coupled to said current sense electrode.

10. The semiconductor package of claim 1 , wherein said first and said second conductive clips are coupled to said first and said second power electrodes by a conductive adhesive.

11. The semiconductor package of claim 10 , wherein said conductive adhesive comprises either a solder or a conductive polymer.

12. The semiconductor package of claim 10 , wherein said conductive adhesive comprises a gold/tin solder.

13. The semiconductor package of claim 2 , wherein said passivation body comprises a polymer.

14. The semiconductor package of claim 13 , wherein said polymer comprises polysiloxane.

Assignees

• Infineon Technologies Americas Corp

Inventors

• Standing Martin
• Clarke Robert J

Classifications

• H10W74/40

  characterised by their materials · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/9415

  relative to the surface, e.g. recessed, protruding · CPC title

• H10W72/07336

  Soldering or alloying · CPC title

• H10W72/07331

  Connecting techniques · CPC title