Wafer processing method

Patent metadata

Field	Value
Publication number	US-9620415-B2
Application number	US-201615237115-A
Country	US
Kind code	B2
Filing date	Aug 15, 2016
Priority date	Aug 18, 2015
Publication date	Apr 11, 2017
Grant date	Apr 11, 2017

Abstract

A wafer formed from an SiC substrate having a first surface and a second surface is divided into individual device chips. A division start point formed by a cutting blade has a depth corresponding to the finished thickness of each device chip along division lines formed on the first surface. A separation start point is formed by a laser beam having a focal point set inside the SiC substrate at a predetermined depth from the second surface, and the laser beam is applied to the second surface while relatively moving the focal point and the SiC substrate to thereby form a modified layer parallel to the first surface and cracks extending from the modified layer along a c-plane. An external force is applied to the wafer, thereby separating the wafer into a first wafer having the first surface and a second wafer having the second surface.

First claim

What is claimed is:

1. A wafer processing method for dividing a wafer into individual device chips, said wafer being formed from an SiC substrate having a first surface, a second surface opposite to said first surface, a c-axis extending from said first surface to said second surface, and a c-plane perpendicular to said c-axis, said wafer processing method comprising:
a separation start point forming step of setting the focal point of a laser beam having a transmission wavelength to said SiC substrate inside said SiC substrate at a predetermined depth from said first surface or said second surface, which depth corresponds to the finished thickness of each device chip, and next applying said laser beam to said first surface or said second surface as relatively moving said focal point and said SiC substrate to thereby form a modified layer parallel to said first surface and cracks extending from said modified layer along said c-plane, thus forming a separation start point;
a device forming step of forming a plurality of devices on said first surface of said SiC substrate in a plurality of separate regions defined by a plurality of crossing division lines, after performing said separation start point forming step;
a division start point forming step of forming a division start point having a depth corresponding to the finished thickness of each device chip along each division line formed on said first surface, after performing said device forming step;
a protective member providing step of providing a protective member on said first surface of said SiC substrate after performing said division start point forming step; and
a wafer separating step of applying an external force to said wafer after performing said protective member providing step, thereby separating said wafer into a first wafer having said first surface of said SiC substrate and a second wafer having said second surface of said SiC substrate at said separation start point;
said separation start point forming step including
a modified layer forming step of relatively moving the focal point of said laser beam in a first direction perpendicular to a second direction where said c-axis is inclined by an off angle with respect to a normal to said second surface and said off angle is formed between said second surface and said c-plane, thereby linearly forming said modified layer extending in said first direction, and
an indexing step of relatively moving said focal point in said second direction to thereby index said focal point by a predetermined amount.

2. The wafer processing method according to claim 1 , wherein said first wafer is divided into said individual device chips by separating said wafer into said first wafer and said second wafer in said wafer separating step.

3. The wafer processing method according to claim 2 , further comprising
a grinding step of grinding the back side of each device chip after performing said wafer separating step, thereby flattening the back side of each device chip.

4. The wafer processing method according to claim 1 , further comprising
a grinding step of grinding the back side of said first wafer after performing said wafer separating step, thereby flattening the back side of said first wafer and dividing said first wafer into said individual device chips.

Assignees

• Disco Corp

Inventors

• Hirata Kazuya
• Nishino Yoko

Classifications

• B24B7/228

  for grinding thin, brittle parts, e.g. semiconductors, wafers (grinding edges of thin, brittle parts B24B9/065) · CPC title

• B23K26/0853

  Devices involving movement of the workpiece in at least two axial directions, e.g. in a plane · CPC title

• B23K26/0006

  taking account of the properties of the material involved (B23K26/32, B23K26/40 take precedence) · CPC title

• B23K2103/56

  being semiconducting · CPC title

• B23K26/53

  for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks · CPC title