Integrated radiation sensitive circuit

US9618635B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9618635-B2
Application numberUS-201213529516-A
CountryUS
Kind codeB2
Filing dateJun 21, 2012
Priority dateJun 21, 2012
Publication dateApr 11, 2017
Grant dateApr 11, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

This disclosure is directed to devices, integrated circuits, and methods for sensing radiation. In one example, a device includes an oscillator, configured to deliver a signal via an output at intervals defined by an oscillation frequency, and a counter, connected to the output of the oscillator and configured to count a number of times the comparator delivers the output signal. The oscillator includes a radiation-sensitive cell that applies a resistance. The resistance of the radiation-sensitive cell is configured to vary in response to incident radiation, wherein the oscillation frequency varies based at least in part on the resistance of the radiation-sensitive cell.

First claim

Opening claim text (preview).

The invention claimed is: 1. A device comprising: an oscillator comprising a radiation-sensitive cell and a comparator, wherein the radiation-sensitive cell is configured to apply a resistance, and the comparator is configured to receive an input signal based at least in part on the resistance applied by the radiation-sensitive cell, and to deliver an output signal via an oscillator output terminal at intervals defined by an oscillation frequency; and a counter, connected to the oscillator output terminal and configured to count a number of times the comparator delivers the output signal from the oscillator; wherein the resistance applied by the radiation-sensitive cell is configured to vary in response to incident radiation, and the oscillator is configured for the oscillation frequency to vary based at least in part on the resistance of the radiation-sensitive cell; wherein the radiation-sensitive cell comprises a single-polysilicon EEPROM cell formed with a standard CMOS process, wherein the single-polysilicon EEPROM cell comprises a control capacitor, a tunneling capacitor, a floating gate transistor, and a floating gate positioned between the tunneling capacitor and the floating gate transistor. 2. The device of claim 1 , wherein the radiation-sensitive cell comprises one or more photodiodes, and the floating gate is configured to be charged via the one or more photodiodes. 3. The device of claim 2 , wherein the one or more photodiodes comprises a plurality of photodiodes in series. 4. The device of claim 3 , wherein the plurality of photodiodes in series comprises between sixteen and thirty-four photodiodes. 5. The device of claim 1 , further comprising a controller connected to an output of the counter, wherein the controller is configured to compare the output of the counter to an expectation value of the output of the counter at a given point in time. 6. The device of claim 5 , wherein the controller is further configured to perform a selected action in response to the output from the counter varying from the expectation value by more than a selected threshold difference. 7. The device of claim 6 , wherein the selected action the controller is configured to perform in response to the output from the counter varying from the expectation value by more than the selected threshold difference comprises signaling that the output from the counter is varying from the expectation value by more than the selected threshold difference. 8. The device of claim 1 , wherein the floating gate is configured to be discharged in response to incident radiation, wherein the radiation-sensitive cell varies in resistance as a function of the floating gate being discharged in response to the incident radiation. 9. An integrated circuit comprising: an EEPROM cell comprising a ground terminal, a cell output terminal, and a floating gate, wherein the floating gate is configured to control a resistance between the ground terminal and the cell output terminal, wherein the EEPROM cell is configured to vary the resistance between the ground terminal and the cell output terminal in response to radiation incident on the EEPROM cell, and thereby vary the voltage of the cell output terminal in response to radiation incident on the EEPROM cell; a MOSFET transistor connected between the cell output terminal and a voltage source terminal; a capacitor connected between the ground terminal and the cell output terminal in parallel with the EEPROM cell; a comparator comprising a first input terminal, a second input terminal, and a comparator output terminal, wherein the first input terminal is connected to the cell output terminal and the second input terminal is connected to a threshold voltage, wherein the comparator is configured to deliver an output signal via the comparator output terminal in response to the voltage of the cell output terminal reaching the threshold voltage; and a counter connected to the comparator output terminal and configured to count a number of times the comparator delivers the output signal; wherein the MOSFET transistor comprises a gate terminal that is connected to the comparator output terminal and configured to vary the resistance between the voltage source and the cell output terminal in response to the output signal from the comparator. 10. The integrated circuit of claim 9 , wherein the radiation-sensitive cell comprises a plurality of series-connected photodiodes, and the floating gate is configured to be charged via the plurality of series-connected photodiodes. 11. The integrated circuit of claim 10 , wherein the floating gate comprises a floating gate transistor and wherein the EEPROM cell further comprises: a tunneling capacitor; and a control capacitor, wherein the floating gate transistor, the tunneling capacitor, and the control capacitor are formed from a single polysilicon insulating layer; wherein the plurality of series-connected photodiodes are connected to the tunneling capacitor and the control capacitor via charging terminals and configured to charge the floating gate by charge carrier tunneling through the polysilicon insulating layer from the tunneling capacitor in response to radiation incident on the plurality of series-connected photodiodes; and wherein the EEPROM cell is configured to increase the resistance between the ground terminal and the cell output terminal from an initial resistance to a higher resistance in response to radiation incident on the plurality of series-connected photodiodes. 12. The integrated circuit of claim 9 , further comprising a frequency-selective shield positioned over the EEPROM cell, wherein the EEPROM cell is configured to vary the resistance between the ground terminal and the cell output terminal in response to radiation of a first frequency range incident on the EEPROM cell, and the EEPROM cell is configured not to vary the resistance between the ground terminal and the cell output terminal in response to radiation of a second frequency range incident on the EEPROM cell. 13. The integrated circuit of claim 9 , further comprising: a cell charging circuit connected to the EEPROM cell and configured to charge the floating gate to an initial charge at which the floating gate applies an initial resistance between the ground terminal and the cell output terminal; wherein the EEPROM cell is configured to decrease the resistance between the ground terminal and the cell output terminal from the initial resistance to a lower resistance in response to radiation incident on the floating gate. 14. The integrated circuit of claim 13 , wherein the floating gate comprises a floating gate transistor and wherein the EEPROM cell further comprises: a tunneling capacitor; and a control capacitor, wherein the floating gate transistor, the tunneling capacitor, and the control capacitor are formed from a single polysilicon EEPROM layer; and wherein the cell charging circuit is connected to the tunneling capacitor and the control capacitor via charging terminals, and the EEPROM cell is configured for the floating gate to be charged by charge carrier tunneling through an insulating layer from the tunneling capacitor in response to the cell charging circuit charging the tunneling capacitor.

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What does patent US9618635B2 cover?
This disclosure is directed to devices, integrated circuits, and methods for sensing radiation. In one example, a device includes an oscillator, configured to deliver a signal via an output at intervals defined by an oscillation frequency, and a counter, connected to the output of the oscillator and configured to count a number of times the comparator delivers the output signal. The oscillator …
Who is the assignee on this patent?
Fechner Paul S, Honeywell Int Inc
What technology area does this patent fall under?
Primary CPC classification G01T7/005. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 11 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).