Conductive pattern and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9615450-B2
Application number	US-201314080980-A
Country	US
Kind code	B2
Filing date	Nov 15, 2013
Priority date	Feb 6, 2009
Publication date	Apr 4, 2017
Grant date	Apr 4, 2017

Abstract

The present invention provides a method for manufacturing a conductive pattern, comprising the steps of: a) forming a conductive film on a substrate; b) forming an etching resist pattern on the conductive film; and c) forming a conductive pattern having a smaller line width than a width of the etching resist pattern by over-etching the conductive film by using the etching resist pattern, and a conductive pattern manufactured by using the same. According to the exemplary embodiment of the present invention, it is possible to effectively and economically provide a conductive pattern having a ultrafine line width.

First claim

The invention claimed is:

1. A method for manufacturing a conductive pattern, comprising the steps of:
a) forming a conductive film on a substrate;
b) forming an etching resist pattern on the conductive film; and
c) forming a conductive pattern having a smaller line width than a width of the etching resist pattern by over-etching the conductive film by using the etching resist pattern; and
d) removing the etching resist pattern after the step c),
wherein in the step b), a line edge roughness (LER) of the etching resist pattern is controlled by ½ or less of the line width of a conductive pattern to be formed in the step c),
wherein the conductive pattern has a thickness of 100 to 300 nm, and
wherein the conductive pattern has an opening ratio of 85% to 98%, and satisfies the following Equation 1:
a /(1−opening ratio)= A   Equation [1]

wherein a is a surface resistance of a layer formed of a material constituting the conductive pattern in a thickness of t, and
A is a surface resistance of the conductive pattern in a thickness of t.

2. The method for manufacturing a conductive pattern according to claim 1 , wherein in the step a), deposition, sputtering, wet coating, evaporation, electroplating, electroless plating or lamination of a metal cladding is used.

3. The method for manufacturing a conductive pattern according to claim 1 , wherein the step a) is a step for forming a conductive film by using a method for providing conductivity by firing or drying after coating a solution of organic metal, nanometal or a complex thereof on the substrate.

4. The method for manufacturing an insulated conductive pattern according to claim 1 , wherein in the step c), an etching time is a just-etching time to a time that is delayed by 2,000% as compared to the just-etching time.

5. The method for manufacturing a conductive pattern according to claim 1 , further comprising a bake step during or after the step b).

6. The method for manufacturing a conductive pattern according to claim 1 , wherein a line width of the conductive pattern is 100 micrometers or less.

7. The method for manufacturing a conductive pattern according to claim 6 , wherein a line width of the conductive pattern is 0.5 to 10 micrometers.

Assignees

• Lg Chemical Ltd

Inventors

• Hwang Ji-Young
• Hwang In-Seok
• Lee Dong-Wook
• Park Min-Choon
• Lee Seung-Heon
• Chun Sang-Ki
• Son Yong-Koo
• Koo Beom-Mo

Classifications

• H05K3/0079

  characterised by the method of application or removal of the mask (H05K3/0091 takes precedence) · CPC title

• H05K3/061 Primary

  Etching masks · CPC title

• Y10T29/49155

  Manufacturing circuit on or in base · CPC title

• H05K3/10

  in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern · CPC title

• H05K2203/1184

  Underetching, e.g. etching of substrate under conductors or etching of conductor under dielectrics; Means for allowing or controlling underetching · CPC title