Compression of integer data using a common divisor

Patent metadata

Field	Value
Publication number	US-9614543-B2
Application number	US-201414299789-A
Country	US
Kind code	B2
Filing date	Jun 9, 2014
Priority date	Dec 30, 2013
Publication date	Apr 4, 2017
Grant date	Apr 4, 2017

Abstract

According to one embodiment of the present invention, a system for compressing data determines a common divisor for a set of values comprising integers. The system divides each value within the set of values by the common divisor to produce reduced values, and represents the set of values in the form of data indicating the common divisor and the reduced values. Embodiments of the present invention further include a method and computer program product for compressing data in substantially the same manners described above.

First claim

What is claimed is:

1. A computer-implemented method of compressing a plurality of integer data values to produce reduced values and of decompressing the reduced values to reproduce the plurality of integer data values, the method comprising:
receiving, at a compressor, the plurality of integer data values;
determining, at the compressor, a common divisor for the received plurality of integer data values;
dividing, at the compressor, each integer data value within the plurality of integer data values by the common divisor to produce reduced values; and
compressing, at the compressor, the plurality of integer data values by representing the plurality of integer data values in a form of data indicating the common divisor and the reduced values, the common divisor being a product of powers of a predetermined set of numbers and data indicating the common divisor includes exponents for the predetermined set of numbers;
receiving, at a hardware decompressor, a reduced value and the exponents for the predetermined set of numbers and decompressing the reduced value, the decompressing further comprising:
receiving, at each of a plurality of hardware units of the hardware decompressor, a respective value and a respective exponent; and
producing, by the plurality of hardware units, an output representing a product of the respective value and a respective number of the predetermined set of numbers raised to a power indicated by the respective exponent, each of the plurality of hardware units including a plurality of times circuits implementing a left hardware shift, wherein the producing the output further comprises:
receiving, by a first hardware unit, the reduced value and a first exponent and producing an output representing a product of the reduced value and a first number of the predetermined set of numbers raised to a power indicated by the first exponent,
receiving, by a second hardware unit, the output of the first hardware unit and a second exponent and producing an output representing a product of the output of the first hardware unit and a second number of the predetermined set of numbers raised to a power indicated by the second exponent, and
receiving, by a third hardware unit, the output of the second hardware unit and a third exponent and producing an output representing a product of the output of the second unit and a third number of the predetermined set of numbers raised to a power indicated by the third exponent.

2. The computer-implemented method of claim 1 , wherein the common divisor is a greatest common divisor of the plurality of integer data values.

3. The computer-implemented method of claim 1 , wherein the determining the common divisor for the received plurality of integer data values further comprises:
determining, at the compressor, a greatest common divisor for the plurality of integer data values;
comparing, at the compressor, the greatest common divisor to a threshold; and
determining, at the compressor, a new common divisor with a lesser value in response to the greatest common divisor exceeding the threshold.

4. The computer-implemented method of claim 1 , wherein the plurality of integer data values represents one of a plurality of sub-sequences of integer data values within a sequence of integer data values, and each sub-sequence of integer data values is compressed using a corresponding common divisor for that sub-subsequence of integer data values.

Assignees

• IBM

Inventors

• Dickie Garth A

Classifications

• H03M7/30 Primary

  Compression (speech analysis-synthesis for redundancy reduction G10L19/00; for image communication H04N); Expansion; Suppression of unnecessary data, e.g. redundancy reduction · CPC title

• H03M7/6005

  Decoder aspects · CPC title