Multi-string inverter having input-side EMC filter

US9614427B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9614427-B2
Application numberUS-201514683301-A
CountryUS
Kind codeB2
Filing dateApr 10, 2015
Priority dateOct 10, 2012
Publication dateApr 4, 2017
Grant dateApr 4, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An inverter includes a DC/AC converter, a DC intermediate circuit on the direct current input side of the DC/AC converter, multiple DC/DC converters connected in parallel to one another on the output side to the DC intermediate circuit, multiple inputs each coupled to one of the DC/DC converters, and an EMC filter connected between the inputs and the DC/DC converters. The EMC filter includes chokes in all current-carrying lines between the inputs and the DC/DC converters and filter capacitors between the inputs and the DC/DC converters leading from all the current-carrying lines to ground. The chokes in all current-carrying lines from the at least two inputs are formed by means of choke windings on a common core of a current-compensated choke.

First claim

Opening claim text (preview).

The invention claimed is: 1. An inverter, comprising: a DC/AC converter, a DC intermediate circuit coupled to a direct current input side of the DC/AC converter, multiple DC/DC converters connected in parallel to one another on an output side thereof, wherein the output side of the multiple DC/DC converters is coupled to the DC intermediate circuit, multiple inputs that are each coupled to an input of one of the DC/DC converters, respectively, an EMC filter connected between the multiple inputs and the inputs of the DC/DC converters, wherein the EMC filter comprises: chokes in all current-carrying lines between the multiple inputs and the inputs of the DC/DC converters, and filter capacitors that lead from all the current-carrying lines to ground between the multiple inputs and the inputs of the DC/DC converters, wherein one of the current-carrying lines comprises a common current-carrying line that leads from an input to the multiple DC/DC converters, and wherein the chokes in all the current-carrying lines comprise choke windings on a common core of a current-compensated choke; and a controller configured to control switches of the DC/DC converters in a synchronous manner when the multiple inputs of the inverter are connected in parallel by means of hard-wiring their current-carrying lines. 2. The inverter as claimed in claim 1 , wherein the chokes each comprise an inductance of between 0.2 mH to 4.0 mH. 3. The inverter as claimed in claim 1 , wherein the choke winding for the choke in the common current-carrying line comprises a line cross-section that is n-times greater than the choke winding for each choke in one of the current-carrying lines that is not the common current-carrying line, wherein n is the number of the inputs. 4. The inverter as claimed in claim 3 , wherein the n-times greater line cross-section of the choke winding in the common current-carrying line is a line cross-section of an individual thick wire conductor. 5. The inverter as claimed in claim 3 , wherein the n-times greater line cross-section of the choke winding in the common current-carrying line is a total line cross-section of multiple parallel guided wire conductors. 6. The inverter as claimed in claim 1 , wherein the choke windings are wound on the common core in a symmetrical manner. 7. The inverter as claimed in claim 1 , wherein the common core is a core that is not provided with slots. 8. The inverter as claimed in claim 1 , wherein the common core is arranged in an upright manner within a housing of the inverter, wherein the choke winding for the choke in the common current-carrying line is arranged at a location within the inverter that is more easily accessible to a cooling air current for the current-compensated choke in comparison to the choke windings for each choke in one of the current-carrying lines that are not common current-carrying lines. 9. The inverter as claimed in claim 1 , wherein the filter capacitors between the chokes and the DC/DC converters are coupled to ground. 10. The inverter as claimed in claim 9 , wherein the filter capacitors are each coupled to ground through series-connected resistors. 11. The inverter as claimed in claim 10 , wherein the filter capacitors comprise a capacitance of at least 47 nF and the resistors comprise an ohmic resistance of between 0.5 to 10 ohm. 12. The inverter as claimed in claim 9 , further comprising other filter capacitors between the inputs and the chokes, wherein the other filter capacitors are coupled to ground and are not damped with resistors, and comprise a smaller capacitance than the filter capacitors that are coupled at one node between the chokes and the DC/DC converters and coupled to ground. 13. The inverter as claimed in claim 12 , wherein the other further filter capacitors comprise a capacitance of between 0.2 nF to 33 nF. 14. An operation method for an inverter comprising: providing an inverter comprising: a DC/AC converter, a DC intermediate circuit coupled to a direct current input side of the DC/AC converter, multiple DC/DC converters connected in parallel to one another on an output side thereof, wherein the output side of the multiple DC/DC converters is coupled to the DC intermediate circuit, multiple inputs that are each coupled to an input of one of the DC/DC converters, respectively, wherein the multiple inputs are connected in parallel by means of hard-wiring their current-carrying lines, an EMC filter connected between the multiple inputs and the inputs of the DC/DC converters, wherein the EMC filter comprises: chokes in all current-carrying lines between the multiple inputs and the inputs of the DC/DC converters, and filter capacitors that lead from all the current-carrying lines to ground between the multiple inputs and the inputs of the DC/DC converters, wherein one of the current-carrying lines comprises a common current-carrying line that leads from an input to the multiple DC/DC converters, and wherein the chokes in all the current-carrying lines comprise choke windings on a common core of a current-compensated choke; and a controller configured to control switches of the DC/DC converters; and controlling the switches of the DC/DC converters in a synchronous manner via the controller.

Assignees

Inventors

Classifications

  • with a plurality of power processing stages connected in parallel · CPC title

  • Circuits or arrangements for compensating for electromagnetic interference in converters or inverters · CPC title

  • using discharge tubes with control electrode or semiconductor devices with control electrode · CPC title

  • by static converters · CPC title

  • involving maximum power point tracking control for photovoltaic sources · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9614427B2 cover?
An inverter includes a DC/AC converter, a DC intermediate circuit on the direct current input side of the DC/AC converter, multiple DC/DC converters connected in parallel to one another on the output side to the DC intermediate circuit, multiple inputs each coupled to one of the DC/DC converters, and an EMC filter connected between the inputs and the DC/DC converters. The EMC filter includes ch…
Who is the assignee on this patent?
Sma Solar Technology Ag
What technology area does this patent fall under?
Primary CPC classification H02M1/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 04 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).