Semiconductor device and method for manufacturing the same

US9614103B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9614103-B2
Application numberUS-201615002002-A
CountryUS
Kind codeB2
Filing dateJan 20, 2016
Priority dateJan 22, 2015
Publication dateApr 4, 2017
Grant dateApr 4, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor device according to an embodiment includes a first region including an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn), a second region and a third region between which the first region is disposed, at least one of the second region and the third region having a higher indium (In) concentration than the first region and containing at least one metal element from the group consisting of titanium (Ti), tungsten (W), copper (Cu), zinc (Zn), aluminum (Al), lead (Pb), and tin (Sn), an electrode; and an insulating layer disposed between the first region and the electrode.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a first region including an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn); a second region and a third region between which the first region is disposed, at least one of the second region and the third region having a higher indium (In) concentration than the first region and containing at least one metal element from the group consisting of titanium (Ti), tungsten (W), copper (Cu), zinc (Zn), aluminum (Al), lead (Pb), and tin (Sn); an electrode; and an insulating layer disposed between the first region and the electrode, wherein a zinc (Zn) concentration in the at least one of the second region and the third region is lower than a zinc (Zn) concentration in the first region. 2. The device according to claim 1 , wherein an oxygen concentration in the at least one of the second region and the third region is lower than an oxygen concentration in the first region. 3. A semiconductor device comprising: a first region including an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn); a second region and a third region between which the first region is disposed, at least one of the second region and the third region having a higher indium (In) concentration than the first region and containing at least one metal element from the group consisting of titanium (Ti), tungsten (W), copper (Cu), zinc (Zn), aluminum (Al), lead (Pb), and tin (Sn); an electrode; and an insulating layer disposed between the first region and the electrode, wherein a gallium (Ga) concentration in the at least one of the second region and the third region is lower than a gallium (Ga) concentration in the first region. 4. A semiconductor device comprising: a first region including an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn); a second region and a third region between which the first region is disposed, at least one of the second region and the third region having a higher indium (In) concentration than the first region and containing at least one metal element from the group consisting of titanium (Ti), tungsten (W), copper (Cu), zinc (Zn), aluminum (Al), lead (Pb), and tin (Sn); an electrode; and an insulating layer disposed between the first region and the electrode, wherein the at least one of the second region and the third region is made of polycrystalline metal. 5. The device according to claim 1 , wherein the first region is amorphous. 6. The device according to claim 1 , further comprising layers disposed on both sides of the electrode. 7. A semiconductor device comprising: a first region including an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn); a second region and a third region between which the first region is disposed, at least one of the second region and the third region having a higher indium (In) concentration than the first region and containing at least one metal element from the group consisting of titanium (Ti), tungsten (W), copper (Cu), zinc (Zn), aluminum (Al), lead (Pb), and tin (Sn), an electrode; an insulating layer disposed between the first region and the electrode; and a region having a lower indium (In) concentration than the first region between the first region and the at least one of the second region and the third region. 8. The device according to claim 1 , wherein the oxide semiconductor contains at least one element from the group consisting of hafnium (Hf), tin (Sn), aluminum (Al), zirconium (Zr), lithium (Li), scandium (Sc), and nitrogen (N). 9. A method for manufacturing a semiconductor device comprising: forming an oxide semiconductor layer containing indium (In), gallium (Ga), and zinc (Zn); forming an insulating layer on the oxide semiconductor layer; forming an electrode on the insulating layer; forming a metal film containing at least one metal element from the group consisting of titanium (Ti), tungsten (W), copper (Cu), zinc (Zn), aluminum (Al), lead (Pb), and tin (Sn) on portions of the oxide semiconductor layer, the portions being exposed on both sides of the electrode; performing a heat treatment in a nonoxidizing atmosphere for one second or more and five minutes or less and reacting the metal film with the oxide semiconductor layer to form a reacted layer; and removing an unreacted portion of the metal film by wet etching. 10. The method according to claim 9 , further comprising forming layers on both sides of the electrode before the forming the metal film. 11. The method according to claim 9 , wherein the reacted layer has a higher indium (In) concentration than a portion of the oxide semiconductor layer facing to the electrode and the reacted layer contains the metal element. 12. The method according to claim 9 , wherein temperature of the heat treatment is 200° C. or higher and 400° C. or lower. 13. The method according to claim 9 , further comprising reducing an In concentration of the portions of the oxide semiconductor layer by a plasma treatment or a heat treatment after the forming the electrode and before the forming the metal film. 14. The device according to claim 7 , wherein an oxygen concentration in the at least one of the second region and the third region is lower than an oxygen concentration in the first region. 15. The device according to claim 7 , wherein the first region is amorphous. 16. The device according to claim 7 , further comprising layers disposed on both sides of the electrode. 17. The device according to claim 7 , wherein the oxide semiconductor contains at least one element from the group consisting of hafnium (Hf), tin (Sn), aluminum (Al), zirconium (Zr), lithium (Li), scandium (Sc), and nitrogen (N).

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9614103B2 cover?
A semiconductor device according to an embodiment includes a first region including an oxide semiconductor containing indium (In), gallium (Ga), and zinc (Zn), a second region and a third region between which the first region is disposed, at least one of the second region and the third region having a higher indium (In) concentration than the first region and containing at least one metal eleme…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H01L29/78693. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 04 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).