Thin film transistor and manufacturing method thereof, array substrate and display device

Patent metadata

Field	Value
Publication number	US-9614098-B2
Application number	US-201414435688-A
Country	US
Kind code	B2
Filing date	Jun 27, 2014
Priority date	Dec 24, 2013
Publication date	Apr 4, 2017
Grant date	Apr 4, 2017

Abstract

A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The method includes forming a gate electrode, a gate insulating layer, a metal oxide semiconductor (MOS) active layer, a source electrode and a drain electrode on a substrate. The MOS active layer includes forming a pattern layer of indium oxide series binary metal oxide including a first, second, and third pattern directly contacting with the source electrode and the drain electrode. An insulating layer formed over the source electrode and the drain electrode acts as a protection layer, the pattern layer of indium oxide series binary metal oxide is implanted with metal doping ions by using an ion implanting process, and is annealed, so that the indium oxide series binary metal oxide of the third pattern is converted into the indium oxide series multiple metal oxide to form the MOS active layer.

First claim

What is claimed is:

1. A method of manufacturing a thin film transistor, comprising:
forming a gate electrode, a gate insulating layer, a metal oxide semiconductor (MOS) active layer, a source electrode and a drain electrode on a substrate;
forming a pattern layer of indium oxide series binary metal oxide, wherein the pattern layer comprises a first pattern corresponding to the source electrode, a second pattern corresponding to the drain electrode and a third pattern corresponding to a gap between the source electrode and the drain electrode, and the pattern layer of indium oxide series binary metal oxide directly contacts the source electrode and the drain electrode;
forming an insulating layer over the source electrode and the drain electrode; and
using the insulating layer formed over the source electrode and the drain electrode as a protection layer, implanting metal doping ions into the pattern layer of indium oxide series binary metal oxide by using an ion implanting process, and annealing it, so that the indium oxide series binary metal oxide of the third pattern is converted into indium oxide series multiple metal oxide to form the MOS active layer.

2. The manufacturing method according to claim 1 , wherein the thin film transistor is a bottom gate type of transistor.

3. The manufacturing method according to claim 1 , further comprising:
using the protection layer as a barrier layer, implanting metal doping ions into the pattern layer of indium oxide series binary metal oxide by using an ion implanting process, and annealing it, so that the indium oxide series binary metal oxide of the third pattern which is not blocked by the source electrode and the drain electrode is converted into the indium oxide series multiple metal oxide to form the MOS active layer.

4. The manufacturing method according to claim 1 , wherein the thin film transistor is a top gate type of transistor.

5. The manufacturing method according to claim 4 , further comprising:
using the gate insulating layer as a barrier layer, implanting metal doping ions into the pattern layer of indium oxide series binary metal oxide by using an ion implanting process, and annealing it, so that the indium oxide series binary metal oxide of the third pattern which is not blocked by the source electrode and the drain electrode is converted into the indium oxide series multiple metal oxide to form the MOS active layer.

6. The manufacturing method according to claim 1 , wherein the indium oxide series binary metal oxide comprises indium tin oxide (ITO), or indium gallium oxide (IGO), or indium zinc oxide (IZO).

7. The manufacturing method according to claim 1 , wherein the metal doping ions comprise at least one kind of zinc ions (Zn2+), gallium ions (Ga3+), tin ions (Sn2+), aluminium ions (Al3+) and hafnium ions (Hf4+).

Assignees

• Boe Technology Group Co Ltd

Inventors

• Zhao Ce
• Jiang Chunsheng
• Yuan Guangcai

Classifications

• H10P30/22

  using masks · CPC title

• H10P14/3434

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H01L29/78606

  Electricity · mapped topic

• H01L29/24

  Electricity · mapped topic

• H01L21/426

  Electricity · mapped topic