Method of forming electromagnetic interference shielding layer of ball grid array semiconductor package and base tape for the method

US9613913B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9613913-B2
Application numberUS-201615155086-A
CountryUS
Kind codeB2
Filing dateMay 16, 2016
Priority dateMay 19, 2015
Publication dateApr 4, 2017
Grant dateApr 4, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided are a method of forming an electromagnetic interference (EMI) shielding layer of a ball grid array (BGA) semiconductor package, and a base tape used in the method, and more particularly, a method of forming a shielding layer for blocking EMI, on an upper surface and lateral surfaces of a BGA semiconductor package having a lower surface, on which a plurality of solder balls are formed, and a base tape used in the method. According to the method of forming an EMI shielding layer of a BGA semiconductor package, the EMI shielding layer may be formed on the BGA semiconductor package quickly, easily, and effectively by using the base tape, thereby not only improving process productivity but also remarkably reducing the manufacturing costs.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming an electromagnetic interference (EMI) shielding layer of a ball grid array (BGA) semiconductor package on external surfaces of the BGA semiconductor package to shield EMI, the method comprising: (a) providing a BGA semiconductor package having a lower surface, on which a plurality of solder balls are formed; (b) providing a base tape having an attaching portion that is thicker than a height of the solder balls and is formed of an elastic adhesive material, wherein ball holes that are concave are formed in the attaching portion of the base tape at positions respectively corresponding to the solder balls of the BGA semiconductor package; (c) forming a package-tape assembly by pressing the BGA semiconductor package against the base tape such that the plurality of solder balls of the BGA semiconductor package are sunk into the attaching portion of the base tape and the BGA semiconductor package is adhered to the base tape, wherein the package-tape assembly is formed by pressing the BGA semiconductor package against the attaching portion while the solder balls of the BGA semiconductor package are disposed to respectively face the ball holes of the attaching portion; (d) forming the EMI shielding layer on the BGA semiconductor package by sputtering a conductive layer on the package-tape assembly; and (e) removing the base tape from the package-tape assembly. 2. The method of claim 1 , wherein the attaching portion of the base tape is elastically and plastically deformed during (c) so as to cover all of the solder balls of the BGA semiconductor package and to be adhered to the lower surface of the BGA semiconductor package. 3. The method of claim 1 , wherein in (e), the package-tape assembly is heated to separate the base tape from the BGA semiconductor package.

Assignees

Inventors

Classifications

  • the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

  • Details of chemical or physical process used for separating the auxiliary support from a device or a wafer · CPC title

  • Wafer tapes, e.g. grinding or dicing support tapes · CPC title

  • Deposition of metallic or metal-silicide materials · CPC title

  • Physical vapour deposition [PVD] · CPC title

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What does patent US9613913B2 cover?
Provided are a method of forming an electromagnetic interference (EMI) shielding layer of a ball grid array (BGA) semiconductor package, and a base tape used in the method, and more particularly, a method of forming a shielding layer for blocking EMI, on an upper surface and lateral surfaces of a BGA semiconductor package having a lower surface, on which a plurality of solder balls are formed, …
Who is the assignee on this patent?
Protec Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W42/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 04 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).