Bandgap circuit for current and voltage

Patent metadata

Field	Value
Publication number	US-9612607-B2
Application number	US-201313929772-A
Country	US
Kind code	B2
Filing date	Jun 27, 2013
Priority date	Jun 27, 2013
Publication date	Apr 4, 2017
Grant date	Apr 4, 2017

Abstract

A simple bandgap current generator combines a PTAT (proportional to absolute temperature) base-emitter voltage (VBE) measured across two binary junction devices (ΔVBE=VBE 1 −VBE 2 ) with a current that is varied by an nWell resistor with a positive temperature coefficient to produce a CTAT (complementary to absolute temperature) current instead of PTAT reference current. One of the base-emitter voltages is constrained to be VBE 1 =VBE( 1 βT). This reduces the temperature dependency of a reference current generated by the bandgap generator. This reference current may be used to generate a bandgap reference voltage by adding an IR drop to a diode voltage or to a base-emitter voltage. The simple bandgap circuit is significantly smaller in size than a precision bandgap circuit, but still provides a voltage and/or a current reference signal having a good accuracy.

First claim

What is claimed is:

1. A method for operating a bandgap reference circuit, the method comprising: producing a bias current through a first resistor having a positive temperature coefficient in a first translinear loop such that the bias current has a positive temperature coefficient;
producing a delta base emitter voltage (VBE) between a first bipolar junction transistor (BJT) having a higher VBE and a second BJT having a lower VBE across a second resistor in a second translinear loop, wherein the second resistor has a positive temperature coefficient;
using the bias current produced by the first translinear loop to bias the first BJT of the second translinear loop, wherein the positive temperature coefficient of the bias current compensates for the positive temperature coefficient of the second resistor; and
producing a temperature compensated reference current through the second resistor responsive to the delta VBE; and wherein the second translinear loop comprises the first and the second BJT as two base connected BJTs coupled to inputs of an amplifier, wherein the second resistor is connected between a first input of the amplifier and an emitter of one of the BJTs.

2. The method of claim 1 , wherein a temperature coefficient of the compensated reference current is less than approximately +/−5%.

3. The method of claim 1 , wherein the first translinear loop comprises two gate connected metal oxide semiconductor (MOS) transistors, wherein a drain of one of the two gate connected MOS transistors is coupled to the first resistor.

4. The method of claim 1 , wherein the first translinear loop comprises two BJTs, wherein a collector of the one of the two BJTs is coupled to the first resistor.

5. The method of claim 1 , wherein the second translinear loop comprises the first and the second BJT as two base connected BJTs coupled to two gate connected N-Channel metal oxide semiconductor (NMOS) transistors, wherein the second resistor is connected between a source of one of the NMOS transistors and an emitter of one of the first and second BJTs.

6. The method of claim 1 , further comprising making a mirror copy of the compensated reference current.

7. The method of claim 1 , further comprising using a mirror copy of the compensated reference current to produce a temperature compensated reference voltage across a resistor connected in series to a third BJT.

8. A bandgap reference circuit comprising:
a first translinear loop having a control node of a first semiconductor device connected to a control node of a second semiconductor device with a first resistor connected to an input node of the first semiconductor device;
a second translinear loop having a control node of a third semiconductor device connected to a control node of a fourth semiconductor device with a second resistor connected to an input node of the fourth semiconductor device; and
wherein the first translinear loop is coupled to the second translinear loop such that a bias current produced in the first resistor flows through the first semiconductor device and through the third semiconductor device and a reference current is produced that flows through the second semiconductor device, the second resistor, and the fourth semiconductor device, wherein the bias current flows in accordance with a positive temperature coefficient and compensates for the positive temperature coefficient of the second resistor; and wherein the second translinear loop further comprises an amplifier with a first input coupled to the third semiconductor device and a second input coupled to the second resistor.

9. The bandgap reference circuit of claim 8 , wherein the second translinear loop further comprises two gate connected metal oxide semiconductor (MOS) devices coupled between the third semiconductor device and the second resistor.

10. The bandgap reference circuit of claim 8 , wherein the first and second semiconductor devices are metal oxide semiconductor (MOS) transistors.

11. The bandgap reference circuit of claim 8 , wherein the first and second semiconductor devices are bipolar junction transistors.

12. The bandgap reference circuit of claim 8 , further comprising a mirror circuit configured to produce a copy of the reference current.

13. The bandgap reference circuit of claim 8 , further comprising a mirror circuit configured to produce a copy of the reference current through a resistor connected in series to a third BJT, whereby a voltage formed across the resistor and third BJT is a temperature compensated reference voltage.

14. A system comprising:
one or more bandgap reference circuits comprising:
a first translinear loop having a control node of a first semiconductor
device connected to a control node of a second semiconductor device with a first resistor connected to an input node of the first semiconductor device;
a second translinear loop having a control node of a third semiconductor
device connected to a control node of a fourth semiconductor device with a second resistor connected to an input node of the fourth semiconductor device; and wherein the first translinear loop is coupled to the second translinear loop
such that a bias current produced in the first resistor flows through the first semiconductor device and through the third semiconductor device and a reference current is produced that flows through the second semiconductor device, the second resistor, and the fourth semiconductor device; and an analog circuit coupled to receive a reference output from one of the one or more bandgap reference circuits, wherein the bias current flows in accordance with a positive temperature coefficient and compensates for the positive temperature coefficient of the second resistor; and
wherein the system further comprises a second analog circuit coupled to receive a reference output from a second one of the bandgap reference circuits.

Assignees

• Texas Instruments Inc
• Texas Instuments Incorporated

Inventors

• Kumar Ajay
• Bhandarkar Rahul

Classifications

• G05F3/08

  wherein the variable is DC · CPC title

• G05F3/30 Primary

  Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities (G05F3/26 takes precedence) · CPC title