Chassis of electronic device

US9609765B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9609765-B2
Application numberUS-201314129597-A
CountryUS
Kind codeB2
Filing dateSep 27, 2013
Priority dateSep 27, 2013
Publication dateMar 28, 2017
Grant dateMar 28, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A chassis for an electronic device may include a first metal layer to form an inner surface of the chassis, an insulating layer on the first metal layer, and a second metal layer on the insulating layer. The second metal layer may be connected to a ground area of a circuit board to be provided in the chassis.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic device to receive power, comprising: a circuit board to receive power, and to have at least one ground area; and a chassis to provide a structural support of components, the chassis to have a first metal layer to form an inner structure of the chassis, a plurality of insulating layers at a plurality of areas on the first metal layer, and a plurality of second metal layers on the plurality of insulating layers, wherein the first metal layer, a first one of the insulating layers and a first one of the second metal layers to form a first capacitive device, and a plurality of electric connecting devices to connect the at least one ground area of the circuit board to the plurality of second metal layers. 2. The electronic device of claim 1 , wherein the plurality of electric connecting devices includes a plurality of wires to be connected between the ground area of the circuit board and the plurality of second metal layers. 3. An electronic device to receive power, comprising: a circuit board to receive a plurality of electrical components, and the circuit board to have a ground area; and a chassis to support components, the chassis to include: an inner metal layer to form an inner structure of the chassis; a first insulating layer on a first portion of the inner metal layer; a second insulating layer on a second portion of the inner metal layer; a first connecting metal layer on the first insulating layer, the first connecting metal layer to be connected to the ground area of the circuit board; and a second connecting metal layer on the second insulating layer, the second connecting metal layer to be connected to the ground area of the circuit board, wherein the inner metal layer, the first insulating layer and the first connecting metal layer to form a first capacitive device. 4. The electronic device of claim 3 , wherein the first connecting metal layer to be connected to the ground area of the circuit board by a wire. 5. The electronic device of claim 3 , wherein the first connecting metal layer to be connected to the ground area of the circuit board by an electric connecting device. 6. The electronic device of claim 3 , wherein the second connecting metal layer to be connected to the ground area of the circuit board by a wire. 7. The electronic device of claim 3 , wherein the second connecting metal layer to be connected to the ground area of the circuit board by an electric connecting device. 8. The electronic device of claim 3 , wherein the circuit board to receive power from a power source. 9. The electronic device of claim 3 , wherein the inner metal layer, the second insulating layer and the second connecting metal layer to form a second capacitive device. 10. The electronic device of claim 3 , wherein the first insulating layer contacts the inner metal layer, and the first connecting metal layer contacts the first insulating layer. 11. The electronic device of claim 10 , wherein the second insulating layer contacts the inner metal layer, and the second connecting metal layer contacts the second insulating layer. 12. The electronic device of claim 3 , wherein the second insulating layer is physically separated from the first insulating layer, and the second connecting metal layer is physically separated from the first connecting metal layer. 13. The electronic device of claim 1 , wherein the first metal layer, a second one of the insulating layers and a second one of the second metal layers to form a second capacitive device. 14. The electronic device of claim 1 , wherein the first one of the insulating layers contacts the first metal layer, and the first one of the second metal layers contacts the first one of the insulating layers. 15. The electronic device of claim 14 , wherein a second one of the insulating layers contacts the first metal layer, and a second one of the second metal layer contacts the second one of the insulating layers. 16. The electronic device of claim 15 , wherein the second one of the insulating layers is physically separated from the first one of the insulating layers, and wherein the second one of the second metal layers is physically separated from the first one of the second metal layers.

Assignees

Inventors

Classifications

  • for portable computers (cooling arrangements therefor G06F1/203; constructional details or arrangements for pocket calculators, electronic agendas or books G06F15/0216; constructional details of portable telephone sets: with several bodies H04M1/0202) · CPC title

  • H05K5/0026Primary

    provided with connectors and printed circuit boards [PCB], e.g. automotive electronic control units · CPC title

  • specially adapted for mounting on a chassis · CPC title

  • H04M1/0202Primary

    Portable telephone sets, e.g. cordless phones, mobile phones or bar type handsets (constructional features of telephone transmitters or receivers, e.g. of speakers or microphones H04M1/03) · CPC title

  • Stacked capacitors (H01G4/33 takes precedence) · CPC title

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Frequently asked questions

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What does patent US9609765B2 cover?
A chassis for an electronic device may include a first metal layer to form an inner surface of the chassis, an insulating layer on the first metal layer, and a second metal layer on the insulating layer. The second metal layer may be connected to a ground area of a circuit board to be provided in the chassis.
Who is the assignee on this patent?
Intel Corp, Liang Xiaoguo, Chen Chung-Hao, and 3 more
What technology area does this patent fall under?
Primary CPC classification H05K5/0026. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).