Open earphone
US-2024422466-A1 · Dec 19, 2024 · US
US9609418B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9609418-B2 |
| Application number | US-201514718223-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 21, 2015 |
| Priority date | Jun 6, 2014 |
| Publication date | Mar 28, 2017 |
| Grant date | Mar 28, 2017 |
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Official abstract text for this publication.
A signal processing circuit comprising: a first signal processor configured to produce a first output signal suitable for driving a first headphone speaker; a second signal processor configured to produce a second output signal suitable for driving a second headphone speaker; a third signal processor configured to receive the first input signal and/or the second input signal and to produce a third output signal suitable for driving a first loudspeaker; and simultaneously provide the first output signal to the first headphone speaker, the second output signal to the second headphone speaker, and the third output signal to the first loudspeaker.
Opening claim text (preview).
The invention claimed is: 1. A signal processing circuit comprising: a first signal processor configured to receive a first input signal and to process the first input signal to produce a first output signal suitable for driving a first headphone speaker; a second signal processor configured to receive a second input signal and to process the second input signal to produce a second output signal suitable for driving a second headphone speaker; a third signal processor configured to receive the first input signal and/or the second input signal and to produce, based on the received signal or signals, a third output signal suitable for driving a first loudspeaker; and wherein the first output signal is configured to be provided to the first headphone speaker, the second output signal is configured to be provided to the second headphone speaker, and the third output signal is configured to be provided to the first loudspeaker; wherein the third signal processor includes a high pass filter. 2. The signal processing circuit of claim 1 , wherein: the first signal processor comprises a first filter; and the second signal processor comprise a second filter. 3. The signal processing circuit of claim 2 , wherein the first filter is a low pass filter and the second filter is a low pass filter. 4. The signal processing circuit of claim 1 , wherein the first signal processor comprises a first delay line configured to provide a delayed first output signal and the second signal processor comprises a second delay line configured to provide a delayed second output signal. 5. The signal processing circuit of claim 4 , wherein: the first headphone comprises a first microphone configured to provide a first information signal, relating to measured sounds, to the signal processing circuit, wherein the signal processing circuit is configured to set the length of a delay applied by the first delay line based on the first information signal; and the second headphone comprises a second microphone configured to provide a second information signal, relating to measured sounds, to the signal processing circuit, wherein the signal processing circuit is configured to set the second delay line based on the second information signal. 6. The signal processing circuit of claim 1 , further comprising: a switching signal processor configured to receive a switching signal from a user interface; and wherein, the first output signal, the second output signal and the third output signal are provided based on the switching signal. 7. The signal processing circuit of claim 1 , wherein the third signal processor is configured to receive the first input signal and the second input signal, and is also configured to produce: the third output signal, based on the first input signal; a fourth output signal, based on the second input signal, suitable for driving a second loudspeaker; and provide the first output signal to the first headphone speaker, the second output signal to the second headphone speaker, the third output signal to the first loudspeaker, and the fourth output signal to the second loudspeaker. 8. The signal processing circuit of claim 1 , wherein the third signal processor comprises a gain unit configured to provide an amplified third output signal. 9. The signal processing circuit of claim 8 , wherein the first headphone comprises a first microphone configured to provide a first information signal, relating to measured sounds, to the signal processing circuit, wherein the signal processing circuit is configured to set a level of gain applied by the gain unit based on the first information signal. 10. The signal processing circuit of claim 1 , wherein the third signal processor comprises an equaliser configured to provide an equalised third output signal. 11. The signal processing circuit of claim 10 , wherein the first headphone comprises a first microphone configured to provide a first information signal, relating to measured sounds, to the signal processing circuit, wherein the signal processing circuit is configured to set the level of equalisation applied by the equaliser based on the first information signal. 12. An integrated circuit comprising the signal processing circuit of claim 1 . 13. An electronic device comprising the signal processing circuit of claim 1 , a first headphone speaker, a second headphone speaker and a first loudspeaker, wherein the first headphone speaker is configured to provide audio to a user in accordance with the first output signal, the second headphone speaker is configured to provide audio to the user in accordance with the second output signal, and the first loudspeaker is configured to provide audio to the user in accordance with the third output signal. 14. A signal processing circuit comprising: a first signal processor configured to receive a first input signal and to process the first input signal to produce a first output signal suitable for driving a first headphone speaker; a second signal processor configured to receive a second input signal and to process the second input signal to produce a second output signal suitable for driving a second headphone speaker; a third signal processor configured to receive the first input signal and/or the second input signal and to produce, based on the received signal or signals, a third output signal suitable for driving a first loudspeaker; and wherein the first output signal is configured to be provided to the first headphone speaker, the second output signal is configured to be provided to the second headphone speaker, and the third output signal is configured to be provided to the first loudspeakers; wherein the third signal processor comprises a gain unit configured to provide an amplified third output signal; and wherein the first headphone comprises a first microphone configured to provide a first information signal, relating to measured sounds, to the signal processing circuit, wherein the signal processing circuit is configured to set a level of gain applied by the gain unit based on the first information signal. 15. The signal processing circuit of claim 14 , wherein: the first signal processor comprises a first filter; the second signal processor comprise a second filter; and either the first or second filter is a low pass filter. 16. The signal processing circuit of claim 14 , wherein the third signal processor includes a high pass filter. 17. The signal processing circuit of claim 14 , wherein the first signal processor comprises a first delay line configured to provide a delayed first output signal and the second signal processor comprises a second delay line configured to provide a delayed second output signal; wherein the signal processing circuit is configured to set the length of a delay applied by the first delay line based on the first information signal; and wherein the second headphone comprises a second microphone configured to provide a second information signal, relating to measured sounds, to the signal processing circuit, wherein the signal processing circuit is configured to set the second delay line based on the second information signal. 18. A signal processing circuit comprising: a first signal processor configured to receive a first input signal and to process the first input signal to produce a first output signal suitable for driving a first headphone speaker; a second signal processor configured to receive a second input signal and to process the second input signal to produce a second output signal suitable for driving a second headphone sp
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