Processing circuit for a multiple sensing structure digital microelectromechanical sensor having a broad dynamic range and sensor comprising the processing circuit

Patent metadata

Field	Value
Publication number	US-9609410-B2
Application number	US-201514626636-A
Country	US
Kind code	B2
Filing date	Feb 19, 2015
Priority date	Feb 20, 2014
Publication date	Mar 28, 2017
Grant date	Mar 28, 2017

Abstract

A processing circuit for a digital sensor, including: a control stage, which generates a control signal; a multiplexing stage, which may be electrically coupled to a plurality of sensing structures for receiving corresponding detection signals and generates a multiplexed signal, on the basis of one between the detection signals, as a function of the control signal; an analog-to-digital conversion stage, which is connected to the multiplexing stage and generates an encoded signal on the basis of the multiplexed signal; and an equalizer, which multiplies the encoded signal by a coefficient that depends upon the control signal.

First claim

The invention claimed is:

1. A processing circuit for a digital sensor, comprising:
a control stage configured to generate a control signal;
a multiplexing stage configured to receive corresponding detection signals from a plurality of external signal sensing structures, said multiplexing stage being configured to generate a multiplexed signal, on the basis of one of said detection signals, as a function of the control signal;
an analog-to-digital conversion stage, coupled to the multiplexing stage and configured to generate a first encoded signal, on the basis of the multiplexed signal; and
an equalizer, configured to multiply the first encoded signal by a coefficient that depends upon the control signal, the equalizer is configured to output a second encoded signal, and the control stage is configured to generate the control signal as a function of the second encoded signal, and wherein the control stage includes:
a filtering stage configured to generate a filtered signal, as a function of the second encoded signal;
a demodulation stage, coupled to the filtering stage and configured to generate a measurement signal as a function of the filtered signal;
a comparator coupled to the demodulation stage and configured to generate a comparison signal; and
an output stage configured to generate the control signal, as a function of the comparison signal.

2. The circuit according to claim 1 wherein the filtering stage comprises at least one numeric low-pass filter and a numeric high-pass filter.

3. The circuit according to claim 1 wherein the comparator is configured to vary the comparison signal as a function of an evolution in time of the measurement signal along a curve with hysteresis.

4. The circuit according to claim 1 wherein the output stage comprises:
a synchronism stage configured to generate a synchronism signal indicating instants of crossing of reference values by one or more of the detection signals; and
a synchronous circuit coupled to the comparator and to the synchronism stage and configured to generate the control signal as a function of the comparison signal and the synchronism signal;
and wherein the multiplexing stage is configured to vary the detection signals, at instants that depend upon said instants of crossing of reference values; and wherein the equalizer is configured to vary said coefficient at the same instants in which the multiplexing stage varies the detection signals.

5. The circuit according to claim 4 wherein the synchronism stage is configured so that the synchronism signal indicates the instants of zero-crossing by said one or more of the detection signals.

6. The circuit according to claim 4 wherein the synchronous circuit is configured so that the control signal is a function of values assumed by the comparison signal in said instants of crossing of reference values by said one or more of the detection signals.

7. The circuit according to claim 1 wherein the analog-to-digital conversion stage comprises an input sigma-delta converter, coupled to the multiplexing stage and configured to generate a first PDM signal.

8. The circuit according to claim 7 wherein the first PDM signal encodes a first stream of samples with a single-bit binary encoding; and wherein the analog-to-digital conversion stage comprises a binary encoder, coupled to the input sigma-delta converter.

9. The circuit according to claim 8 wherein the second encoded signal is formed by a second stream of samples, said circuit further comprising an output sigma-delta converter, of a digital-to-digital type, coupled to the equalizer and configured to generate a second PDM signal.

10. The circuit according to claim 1 wherein the equalizer is configured to select said coefficient from among a plurality of coefficients, as a function of the control signal.

11. A device, comprising:
a package;
a sensor formed in the package, the sensor includes:
a first die;
a second die;
a plurality of sensing structures formed on the first die, each configured to output a detection signal; and
a processing circuit formed on the second die, the processing circuit includes:
a control stage configured to generate a control signal;
a multiplexing stage configured to receive the detection signals from the plurality of sensing structures, the multiplexing stage being configured to generate a multiplexed signal, on the basis of one of the detection signals, as a function of the control signal;
an analog-to-digital conversion stage, coupled to the multiplexing stage and configured to generate a first encoded signal, on the basis of the multiplexed signal; and
an equalizer, configured to multiply the first encoded signal by one of a plurality of coefficients, the one of the plurality of coefficients depending upon the control signal, the equalizer is configured to output a second encoded signal, and the control stage is configured to generate the control signal as a function of the second encoded signal, and wherein the control stage includes:
a filtering stage configured to generate a filtered signal, as a function of the second encoded signal;
a demodulation stage, coupled to the filtering stage and configured to generate a measurement signal as a function of the filtered signal;
a comparator coupled to the demodulation stage and configured to generate a comparison signal; and
an output stage configured to generate the control signal, as a function of the comparison signal.

12. The device according to claim 11 wherein the plurality of sensing structures have different sensitivities, and wherein each coefficient of said plurality of coefficients is a function of the sensitivity of a corresponding sensing structure; and wherein the equalizer is such that, when the multiplexed signal is generated on the basis of one of the detection signals coming from a first sensing structure of the plurality of sensing structures, the first encoded signal is multiplied by one of the coefficients that corresponds to said first sensing structure.

13. The device according to claim 12 wherein the coefficients of said plurality of coefficients are such that products of one of the coefficients by one of the sensitivities of the corresponding sensing structures are substantially equal to the same value.

14. The device according to claim 12 wherein the multiplexing stage comprises:
a plurality of amplification stages, electrically coupled to corresponding sensing structures, each amplification stage being configured to generate a respective input signal on the basis of the corresponding detection signal and of a respective gain; and
a multiplexer configured to generate the multiplexed signal, on the basis of one of said input signals, as a function of the control signal,
and wherein the coefficients of said plurality of coefficients are such that products of one of the coefficients by one of the sensitivities of the corresponding sensing structures and by one of the gains of the corresponding amplification stages are substantially equal to the same value.

15. The device according to claim 11 wherein the sensor is a microphone.

16. The device according to claim 11 wherein the sensing structures are formed in a first die and the processing circuit is formed in a second die.

17. An electronic system, comprising:
a processing unit;
a speaker, coupled to the processing unit; and
a sensor package that includes:
a first die;
a plurality of sensing structures formed on the first die and each configured to output a detection signal; and
a second die;
a processing circuit formed on the s

Assignees

• St Microelectronics Srl

Inventors

• Miluzzi Eugenio
• Zerbini Martino
• Negri Davide

Classifications

• H04R1/04

  Structural association of microphone with electric circuitry therefor (in electric hearing aids H04R25/00) · CPC title

• H04R3/00

  Circuits for transducers (arrangements for producing a reverberation or echo sound G10K15/08; amplifiers H03F) · CPC title

• H04R1/08 Primary

  Mouthpieces; {Microphones;} Attachments therefor · CPC title

• H04R2201/003

  Mems transducers or their use · CPC title

• H04R3/005 Primary

  for combining the signals of two or more microphones (specially adapted for hearing aids H04R25/407) · CPC title