Solid-state imaging device performing feed-forward control of multiplication factor of multiplication register to match dynamic range of the device with the intensity distribution of incident light

Patent metadata

Field	Value
Publication number	US-9609247-B2
Application number	US-201013144741-A
Country	US
Kind code	B2
Filing date	Jan 22, 2010
Priority date	Jan 30, 2009
Publication date	Mar 28, 2017
Grant date	Mar 28, 2017

Abstract

A solid-state imaging device 1 according to one embodiment of the present invention is a charge multiplying solid-state imaging device, and includes an imaging area 10 that generates a charge according to the amount of incident light, an output register unit 20 that receives the charge from the imaging area 10 , and a multiplication register unit 28 that multiplies the charge from the output register 20 , and performs feed-forward control of the multiplication factor of the multiplication register unit 28 according to the charge amount from the imaging area 10.

First claim

The invention claimed is:

1. A charge multiplying solid-state imaging device comprising:
an imaging area that generates a charge according to the amount of incident light;
an output register unit that receives the charge from the imaging area;
a multiplication register unit that multiplies the charge from the output register unit by using an impact ionization effect;
an amplifier that receives the multiplied charge via an output of the multiplication register unit,
the solid-state imaging device performing feed-forward control of a multiplication factor of the multiplication register unit according to the charge amount from the imaging area;
a detection unit that detects the amount of charge to be input to the multiplication register unit;
a control unit that performs feed-forward control of the multiplication factor of the multiplication register unit according to the charge amount detected by the detection unit; and
a delay register unit disposed between the detection unit and the multiplication register unit, for delaying charge transfer from the detection unit to the multiplication register unit.

2. The solid-state imaging device according to claim 1 , further comprising a detection register unit that receives the charge from the imaging area, and
a control unit that performs feed-forward control of the multiplication factor of the multiplication register unit according to the amount of charge output from the detection register unit.

3. The solid-state imaging device according to claim 1 or 2 , further comprising a delay register unit disposed between the output register unit and the multiplication register unit, for delaying charge transfer from the output register unit to the multiplication register unit.

4. The solid-state imaging device according to claim 1 , wherein
the control unit controls the multiplication factor of the multiplication register unit according to any of the maximum value, minimum value, and average value of the amount of charges detected by the detection unit.

5. The solid-state imaging device according to claim 2 , wherein
the control unit controls the multiplication factor of the multiplication register unit according to any of the maximum value, minimum value, and average value of the amount of charges output from the detection register unit.

6. The solid-state imaging device according to claim 1 , wherein
the detection unit includes a floating gate amplifier.

7. A charge multiplying solid-state imaging device comprising:
an imaging area that generates a charge according to the amount of incident light;
a plurality of output register units that receive the charge from the imaging area;
a plurality of multiplication register units that multiply the charges from the output register units, respectively;
a plurality of amplifiers that receive the multiplied charges via outputs of the multiplication register units,
the solid-state imaging device performing feed-forward control of multiplication factors of the multiplication register units, respectively, according to the amount of charges to be input to the multiplication register units, respectively,
a plurality of detection units that respectively detect the amount of charges to be input to the multiplication register units, respectively,
a plurality of control units that respectively perform feed-forward control of the multiplication factors of the multiplication register units, respectively, according to the charge amounts detected by the plurality of detection units, respectively, and
a plurality of delay register units, respectively disposed between the respective detection units and the respective multiplication register units, for delaying charge transfer from the detection units to the multiplication register units, respectively.

Assignees

• Suzuki Hisanori
• Yoneta Yasuhito
• Takagi Shin-Ichiro
• Maeta Kentaro
• Muramatsu Masaharu
• Hamamatsu Photonics Kk

Inventors

• Suzuki Hisanori
• Yoneta Yasuhito
• Takagi Shin-Ichiro
• Maeta Kentaro
• Muramatsu Masaharu

Classifications

• H04N25/713 Primary

  Transfer or readout registers; Split readout registers or multiple readout registers · CPC title

• H04N25/00

  Circuitry of solid-state image sensors [SSIS]; Control thereof · CPC title

• H01L27/14609

  Electricity · mapped topic

• H04N5/37213 Primary

  Electricity · mapped topic

• H01L27/14812

  Electricity · mapped topic