Apparatus and method for converting floating-point operand into a value having a different format

Patent metadata

Field	Value
Publication number	US-9608662-B2
Application number	US-201414498118-A
Country	US
Kind code	B2
Filing date	Sep 26, 2014
Priority date	Sep 26, 2014
Publication date	Mar 28, 2017
Grant date	Mar 28, 2017

Abstract

A data processing apparatus has floating-point add circuitry to perform a floating-point addition operation for adding or subtracting two floating-point values. The apparatus also has conversion circuitry to perform a conversion operation to convert a first floating-point value into a second value having a different format. The conversion circuitry is capable of converting to an integer or fixed-point value. The conversion circuitry is physically distinct from the floating-point add circuitry.

First claim

We claim:

1. A data processing apparatus comprising:
floating-point add circuitry to perform a floating-point addition operation for adding or subtracting two floating-point values to generate a result floating-point value; and
conversion circuitry to perform a conversion operation to convert a first floating-point value into a second value having a different format to the first floating-point value;
wherein the conversion circuitry is capable of performing the conversion operation where the second value is an integer value or a fixed-point value; and
the conversion circuitry is physically distinct from the floating-point add circuitry;
wherein the conversion circuitry comprises shift circuitry to shift a significand of the first floating-point value by a shift amount depending on the format of the first floating-point value and the format of the second value to generate a shifted significand.

2. The data processing apparatus according to claim 1 , wherein the floating-point add circuitry is capable of performing the floating-point addition operation in M processing cycles, and the conversion circuitry is capable of performing the conversion operation in N processing cycles, where N<M.

3. The data processing apparatus according to claim 1 , wherein the conversion circuitry is capable of performing the conversion operation where the second value is a second floating-point value having a different format to the first floating-point value.

4. The data processing apparatus according to claim 3 , wherein the second floating-point value has a significand with fewer bits than a significand of the first floating-point value.

5. The data processing apparatus according to claim 4 , wherein the conversion circuitry is capable of generating the second floating-point value with a subnormal value if the first floating-point value is smaller than a minimum value representable as a normal value in the format of the second floating-point value.

6. The data processing apparatus according to claim 3 , wherein the conversion circuitry comprises exponent generating circuitry to convert an exponent of the first floating-point value to an exponent of the second floating-point value.

7. The data processing apparatus according to claim 1 , wherein the conversion circuitry comprises shift control circuitry to determine the shift amount based on at least one control parameter specifying at least one of the format of the first floating-point value and the format of the second value.

8. The data processing apparatus according to claim 1 , wherein the conversion circuitry comprises shift control circuitry to determine the shift amount in dependence on an exponent of the first floating-point value if the second value is a second floating-point value and the first floating-point value is smaller than a minimum value representable as a normal value in the format of the second floating-point value.

9. The data processing apparatus according to claim 1 , wherein the conversion circuitry comprises shift control circuitry to determine the shift amount in dependence on a parameter representing the position of a radix point of the second value if the second value is a fixed-point value.

10. The data processing apparatus according to claim 1 , wherein the conversion circuitry comprises inverting circuitry to invert the significand of the first floating-point value or the shifted significand generated by the shift circuitry if the first floating-point value represents a negative value and the second value is a fixed-point value or an integer value.

11. The data processing apparatus according to claim 1 , wherein the conversion circuitry comprises rounding circuitry to round the output of the shift circuitry to a value representable in the format of the second value.

12. The data processing apparatus according to claim 11 , wherein the rounding circuitry comprises rounding control circuitry to determine a rounding increment, and an adder to add the rounding increment to the shifted significand to generate a significand of the second value.

13. The data processing apparatus according to claim 12 , wherein if the first floating-point value represents a negative value and the second value is a fixed-point value or an integer value, then the adder is configured to add the rounding increment to an inverted version of the shifted significand, and the rounding control circuitry is configured to determine the rounding increment based on a non-inverted output of the shift circuitry.

14. A data processing apparatus comprising:
floating-point adding means for performing a floating-point addition operation for adding or subtracting two floating-point values to generate a result floating-point value; and
conversion means for performing a conversion operation to convert a first floating-point value into a second value having a different format to the first floating-point value;
wherein the conversion means is capable of performing the conversion operation where the second value is an integer value or a fixed-point value; and
the conversion means is physically distinct from the floating-point add means;
wherein the conversion means comprises means for shifting a significand of the first floating-point value by a shift amount depending on the format of the first floating-point value and the format of the second value to generate a shifted significand.

15. A data processing method comprising:
performing a conversion operation to convert a first floating-point value into a second value having a different format to the first floating-point value;
wherein the conversion operation is performed using conversion circuitry which is physically distinct from floating-point add circuitry for performing a floating-point addition operation for adding or subtracting two floating-point values to generate a result floating-point value; and
the conversion circuitry is capable of performing the conversion operation where the second value is an integer value or fixed-point value;
wherein the conversion operation comprises shifting a significand of the first floating-point value by a shift amount depending on the format of the first floating-point value and the format of the second value to generate a shifted significand.

Assignees

• Advanced Risc Mach Ltd

Inventors

• Lutz David Raymond
• Burgess Neil

Classifications

• H03M7/24 Primary

  Conversion to or from floating-point codes · CPC title