Electronic equipment unit and manufacturing mold assembly thereof

US9608350B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9608350-B2
Application numberUS-201514804616-A
CountryUS
Kind codeB2
Filing dateJul 21, 2015
Priority dateMar 2, 2015
Publication dateMar 28, 2017
Grant dateMar 28, 2017

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic equipment unit includes a multi-layer circuit board. A part arrangement region on which circuit parts are mounted and a terminal region are provided on the multi-layer circuit board. The part arrangement region is encapsulated with resin. An outline region is formed from a solder resist film surrounding the part arrangement region to prevent the resin from flowing into the terminal region. A non-solder resist region is provided so as to surround the outline region and formation of the solder resist film is inhibited in the non-solder resist region. A clamp abutting surface which is pressed by a mold and surrounds the terminal region and thereby prevents the resin from flowing into the terminal region is a partial region of the multi-layer circuit board where a surface layer circuit pattern is absent.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic equipment unit of a card edge terminal type including a plurality of copper foil pattern terminals pressed by external connection contact terminals in at least one of both surfaces at end portions on a first side and a second side parallel to the first side of a multi-layer circuit board, wherein: the multi-layer circuit board includes, a part arrangement region in which a plurality of circuit parts are connected with solder, an outline region which surrounds the part arrangement region and in which a solder resist film is formed, and a non-solder resist region which is further located outside of the outline region and in which formation of the solder resist film is inhibited; the copper foil pattern terminals connected to a plurality of the circuit parts are provided to at least one of the first side and the second side; a solder resist film is formed in the card edge terminal region which is a peripheral portion of the copper foil pattern terminals except for a conductive contact surface; the multi-layer circuit board and a plurality of the circuit parts are integrally molded with encapsulation resin which is heat-curable resin except for the card edge terminal region; the copper foil pattern terminals are formed on a surface layer through via holes by passing through the non-solder resist region by means of an inner layer pattern of the multi-layer circuit board; and a clamp abutting surface which is pressed by a mold and surrounds the card edge terminal region and thereby prevents the encapsulation resin from flowing into the card edge terminal region is a partial region of the multi-layer circuit board where a surface layer circuit pattern is absent. 2. The electronic equipment unit according to claim 1 , wherein: the non-solder resist region is provided with at least one of two-side connection holes connecting the encapsulation resin on board front and back surfaces to each other and surface sac holes allowing the encapsulation resin on the board front and back surfaces to closely adhere to the board front and back surfaces, respectively. 3. The electronic equipment unit according to claim 1 , wherein: the encapsulation resin extends to end-face outline portions on the first side and the second side and side-surface outline portions on a third side and a fourth side orthogonal to the first side and the second side and thereby surrounds the multi-layer circuit board along an entire circumference; in a case where a plurality of the copper foil pattern terminals are divided to two groups arranged on right and left sides and a cut portion is provided to the card edge terminal region of the multi-layer circuit board, an intermediate outline portion extended from the encapsulation resin is provided to an outer periphery of the cut portion; an external connection connector is attached to a plurality of the copper foil pattern terminals; the connector includes a plurality of contact terminal members which come into conductive contact with the copper foil pattern terminals and includes at least one of both-side fitting portions which fit to the side-surface outline portions and an intermediate fitting portion which fits to the intermediate outline portion; and positional relations of the side-surface outline portions and the intermediate outline portion with respect to a plurality of the copper foil pattern terminals are determined by using positioning reference holes provided to the multi-layer circuit board at diagonal positions as common reference points. 4. The electronic equipment unit according to claim 3 , wherein: the contact terminal members include contact terminals brought into press-contact with the copper foil pattern terminals via conductive elastic members; each of the end-face outline portions is of a trapezoidal shape in cross section and has inclined portions; and when the connector is attached to the end face of the multi-layer circuit board, intervals of the elastic members are increased by the inclined portions. 5. The electronic equipment unit according to claim 3 , wherein: the multi-layer circuit board includes an edge-cut substrate cut in a latter step; all of a plurality of the copper foil pattern terminals are connected to a common connection pattern provided inside the edge-cut substrate via a separate inner layer pattern; and the edge-cut substrate is cut at a region of the inner layer pattern and removed after gold plating is applied using an electrolytic plating electrode terminal provided to the connection pattern. 6. A manufacturing mold assembly for the electronic equipment unit, configured in such a manner so as to: pinch, between a pair of a lower mold and an upper mold opposing each other, the multi-layer circuit board including a plurality of the circuit parts mounted in the part arrangement region, the non-solder resist region provided on an outer side of the part arrangement region, and the card edge terminal region in which a plurality of the copper foil pattern terminals are formed and which is provided to at least one of two sides on an outer side of the non-solder resist region; and integrally mold the multi-layer circuit board and a plurality of the circuit parts except for the card edge terminal region with the encapsulation resin by press-injecting heat-curable resin melted by heating from an injection port provided to a boundary surface, wherein: a movable mold is provided to at least one of the lower mold and the upper mold; the movable mold includes a terminal relief recess to prevent the encapsulation resin from flowing into the card edge terminal region and presses the clamp abutting surface of the multi-layer circuit board using an outer peripheral portion of the terminal relief recess via a board thickness adjusting mechanism; and the board thickness adjusting mechanism includes one of an air pressure adjusting mechanism, a liquid pressure adjusting mechanism, and a pressing elastic member to maintain a constant pressing pressure even when a thickness dimension of the multi-layer circuit board varies. 7. The manufacturing mold assembly of the electronic equipment unit according to claim 6 , wherein: the encapsulation resin communicates with side-surface outline portions, end-face outline portions, and an intermediate outline portion in peripheral end-face portions of the multi-layer circuit board; the lower mold is provided with positioning pins which stand upright and fit into reference holes provided to the multi-layer circuit board at diagonal positions; and the positioning pins are pulled out from the lower mold before the encapsulation resin cures and returned and set at a predetermined position before a next multi-layer circuit board before molding is mounted. 8. The manufacturing mold assembly of the electronic equipment unit according to claim 6 , wherein: a plurality of lower board temporary fixing pins provided to the lower mold and a plurality of upper board temporary fixing pins provided to the upper mold press against each other at a predetermined pressure, respectively, from a back surface and a front surface of the mounted multi-layer circuit board; the lower board temporary fixing pins and the upper board temporary fixing pins are pulled out, respectively, from the lower mold and the upper mold before the encapsulation resin cures and returned and set again at respective predetermined positions before a next multi-layer circuit board before molding is mounted; and both of the lower board temporary fixing pins and the upper board temporarily fixing pins press the non-solder resist region of the multi-layer circuit board.

Assignees

Inventors

Classifications

  • Use of materials for the {conductive, e.g. } metallic pattern · CPC title

  • Applying non-metallic protective coatings {(H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673)} · CPC title

  • Multilayer circuits · CPC title

  • characterised by the material, e.g. plating, or coating materials · CPC title

  • Moulding over PCB locally or completely · CPC title

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Frequently asked questions

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What does patent US9608350B2 cover?
An electronic equipment unit includes a multi-layer circuit board. A part arrangement region on which circuit parts are mounted and a terminal region are provided on the multi-layer circuit board. The part arrangement region is encapsulated with resin. An outline region is formed from a solder resist film surrounding the part arrangement region to prevent the resin from flowing into the termina…
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification H01R12/721. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).