Nano-structure semiconductor light emitting device

US9608163B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9608163-B2
Application numberUS-201414165082-A
CountryUS
Kind codeB2
Filing dateJan 27, 2014
Priority dateJan 29, 2013
Publication dateMar 28, 2017
Grant dateMar 28, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A nano-structure semiconductor light emitting device includes a base layer formed of a first conductivity type semiconductor, and a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer. A plurality of nanocores is disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconductor. An active layer is disposed on surfaces of the plurality of nanocores and positioned above the first insulating layer. A second insulating layer is disposed on the first insulating layer and has a plurality of second openings surrounding the plurality of nanocores and the active layer disposed on the surfaces of the plurality of nanocores. A second conductivity-type semiconductor layer is disposed on the surface of the active layer positioned to be above the second insulating layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A nano-structure semiconductor light emitting device comprising: a base layer formed of a first conductivity type semiconductor; a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer; a plurality of nano-light emitting structures, each comprising a nanocore disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconductor and a shell including an active layer and a second conductivity-type semiconductor layer sequentially disposed on a surface of the nanocore; and a second insulating layer disposed on the first insulating layer and having a plurality of second openings surrounding the nanocore and the active layer, wherein the second openings have a diameter greater than that of the first openings, and a portion of the first insulating layer in a perimeter of the first openings is exposed by the second openings; wherein the active layer is entirely positioned above the exposed portion of first insulating layer and the second conductivity-type semiconductor layer is entirely positioned above the second insulating layer. 2. The nano-structure semiconductor light emitting device of claim 1 , wherein regions of the nanocores positioned in the second openings have a sectional area greater than upper and lower regions thereof. 3. The nano-structure semiconductor light emitting device of claim 1 , wherein the first and second insulating layers are made of a same material. 4. The nano-structure semiconductor light emitting device of claim 1 , wherein the first and second insulating layers have different etching rates under same etching conditions. 5. The nano-structure semiconductor light emitting device of claim 4 , wherein an etching rate of the second insulating layer is higher than that of the first insulating layer. 6. The nano-structure semiconductor light emitting device of claim 4 , wherein the first and second insulating layers are made of different materials or have different air gap densities. 7. The nano-structure semiconductor light emitting device of claim 1 , wherein the second insulating layer is made of a material obtained by oxidizing a material of the first insulating layer.

Assignees

Inventors

Classifications

  • H01L33/24Primary

    Electricity · mapped topic

  • Electricity · mapped topic

  • Nanooptics, e.g. quantum optics or photonic crystals · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US9608163B2 cover?
A nano-structure semiconductor light emitting device includes a base layer formed of a first conductivity type semiconductor, and a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer. A plurality of nanocores is disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconduc…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L33/24. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 28 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).