Semiconductor device

Patent metadata

Field	Value
Publication number	US-9608101-B2
Application number	US-201213976757-A
Country	US
Kind code	B2
Filing date	Jan 4, 2012
Priority date	Jan 4, 2011
Publication date	Mar 28, 2017
Grant date	Mar 28, 2017

Abstract

The present invention concerns semiconductor devices comprising a source electrode, a drain electrode and a semiconducting layer consisting of a single or double 2-dimensional layer(s) made from one of the following materials: MoS 2 , MoSe 2 , WS 2 , WSe 2 , MoTe 2 or WTe 2 . Replacing a stack by only one or two 2-dimensional layer(s) of MoS 2 , MoSe 2 , WS 2 , or WSe 2 , MoTe 2 or WTe 2 provides an enhanced electrostatic control, low power dissipation, direct band gap and tunability.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a source electrode;
a drain electrode;
a semiconducting layer consisting of a single 2-dimensional layer made from one of the following materials: MoS 2 , MoSe 2 , WS 2 , WSe 2 , MoTe 2 or WTe 2 ;
a gate electrode, wherein said gate electrode extends over said source electrode and said drain electrode; and
a dielectric layer placed between said semiconducting layer and said gate electrode, wherein said dielectric layer is configured to form a protective layer on said semiconducting layer.

2. Semiconductor device according to claim 1 devoid of a top gate electrode and a top dielectric layer.

3. Sensor based on a semiconductor device according to claim 2 .

4. Semiconductor device according to claim 1 comprising a second gate electrode.

5. Semiconductor device according to claim 4 wherein said second gate electrode is embedded within an oxide layer.

6. Semiconductor device according to claim 1 , wherein said semiconducting layer is a nanosized layer.

7. Semiconductor device according to claim 6 wherein said semiconducting layer is between 0.5 and 1.5 nm thick.

8. Semiconductor device according to claim 1 , wherein at least one of said electrodes is made of graphene.

9. Semiconductor device according to claim 1 , wherein said dielectric layer is made of HfO 2 .

10. Transistor comprising a semiconductor device according to claim 1 .

11. Digital inverter comprising a semiconductor device according to claim 1 .

12. A semiconductor device comprising:
a source electrode;
a drain electrode;
a first gate electrode;
a second gate electrode;
a semiconducting layer consisting of a single 2-dimensional layer made from one of the following materials: MoS 2 , MoSe 2 , WS 2 , and WSe 2 ; and
a dielectric layer placed between said semiconducting layer and said first gate electrode; and dielectric later being configured to protect said semiconducting layer.

13. A semiconductor device according to claim 12 wherein said first gate electrode is extending over said source electrode and said drain electrode.

14. A semiconductor device according to claim 12 wherein said first gate electrode is embedded within said dielectric layer.

15. A sensor based on the semiconductor device according to claim 12 .

16. A semiconductor device according to claim 12 wherein said second gate electrode is embedded within an oxide layer.

17. A semiconductor device according to claim 12 , wherein said semiconducting layer is a nanosized layer.

18. A semiconductor device according to claim 17 wherein said semiconducting layer is between 0.5 and 1.5 nm thick.

19. A semiconductor device according to claim 12 , wherein at least one of said electrodes is made of graphene.

20. A semiconductor device according to claim 12 , wherein said dielectric layer is made of HfO 2 .

21. A transistor comprising the semiconductor device according to claim 12 .

22. A digital inverter comprising the semiconductor device according to claim 12 .

23. A semiconductor device comprising:
a source electrode;
a drain electrode;
a semiconducting layer comprising two or fewer 2-dimensional layers made from one of the following materials: MoS 2 , MoSe 2 , WS 2 , WSe 2 , MoTe 2 or WTe 2 ;
a gate electrode, wherein said gate electrode extends over said source electrode and said drain electrode;
a dielectric layer placed between said semiconducting layer and said gate electrode, wherein said dielectric layer is configured to form a protective layer on said semiconducting layer; and
a second gate electrode, wherein said second gate electrode is embedded within an oxide layer.

24. Semiconductor device according to claim 23 , wherein at least one of said electrodes is made of graphene and wherein said dielectric layer is made of HfO 2 .

25. A semiconductor device comprising:
a source electrode;
a drain electrode;
a semiconducting layer consisting of a single 2-dimensional layer made from one of the following materials: MoS 2 , MoSe 2 , WS 2 , WSe 2 , MoTe 2 or WTe 2 ;
a gate electrode, wherein said gate electrode is embedded within a dielectric layer; and
said dielectric layer placed between said semiconducting layer and said gate electrode, wherein said dielectric layer is configured to form a protective layer on said semiconducting layer.

26. The semiconductor device of claim 25 , wherein the device is devoid of a top gate electrode and a top dielectric layer.

27. A sensor based on a semiconductor device according to claim 25 .

28. The semiconductor device of claim 25 , further comprising a second gate electrode.

29. The semiconductor device of claim 25 , wherein said second gate electrode is embedded within an oxide layer.

30. A semiconductor device comprising:
a source electrode;
a drain electrode;
a gate electrode;
a semiconducting layer consisting of a single 2-dimensional layer made from one of the following materials: MoS 2 , MoSe 2 , WS 2 , and WSe 2 ; and
a dielectric layer placed between said semiconducting layer and said gate electrode, wherein said dielectric layer is made of a high dielectric constant dielectric layer.

Assignees

• Kis Andras
• Radisavljevic Branimir
• Ecole Polytechnique Fed De Lausanne (Epfl)

Inventors

• Kis Andras
• Radisavljevic Branimir

Classifications

• H01L29/78681

  Electricity · mapped topic

• H01L29/66742

  Electricity · mapped topic

• H01L29/778 Primary

  Electricity · mapped topic

• H10D64/033

  comprising ferroelectric layers · CPC title

• H10D30/675

  Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium · CPC title